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A Modular, Adaptive, and Scalable Quantum Factoring Algorithm

Alok Shukla, Prakash Vedula

TL;DR

Shor’s factorization algorithm faces practical barriers on NISQ devices due to the need for a large phase-register and deep circuits. The authors introduce a modular, windowed Shor framework that replaces monolithic phase estimation with multiple shallow, overlapping QPE blocks and a carry-aware classical stitching layer, reducing the counting-qubit burden to a small fixed size $m_{ ext{max}}$ while leaving the work register unchanged. The approach includes a non-standard initial target state $\ket{\psi_0}$ to bias eigenstate amplitudes and robustly reconstructs the full phase via stitching and continued-fraction period recovery, with extensive numerical demonstrations on cases like $N=15$, $N=221$, and larger Ish. The combination of block-level parallelism, overlap-based redundancy, and lightweight classical postprocessing promises substantial practical gains for quantum factoring on near-term hardware and remains compatible with existing arithmetic-optimizations for overall efficiency.

Abstract

Shor's algorithm for integer factorization offers an exponential speedup over classical methods but remains impractical on Noisy Intermediate Scale Quantum (NISQ) hardware due to the need for many coherent qubits and very deep circuits. Building on our recent work on adaptive and windowed phase-estimation methods, we have developed a modular, windowed formulation of Shor's algorithm that mitigates these limitations by restructuring phase estimation into shallow, independent circuit blocks that can be executed sequentially or in parallel, followed by lightweight classical postprocessing. This approach allows for a reduction in the size of the phase (or counting) register from a large number of qubits down to a small, fixed block size of only a few qubits (for example, three or four phase qubits were sufficient for the computational examples considered in this work), while leaving the work register requirement unchanged. The independence of the blocks allows for parallel execution and makes the approach more compatible with near-term hardware than the standard Shor's formulation. An additional feature of the framework is the overlap mechanism, which introduces redundancy between blocks and enables robust reconstruction of phase information, though zero-overlap configurations can also succeed in certain regimes. Numerical simulations verify the correctness of the modular formulation while also showing substantial reductions in counting qubits per block.

A Modular, Adaptive, and Scalable Quantum Factoring Algorithm

TL;DR

Shor’s factorization algorithm faces practical barriers on NISQ devices due to the need for a large phase-register and deep circuits. The authors introduce a modular, windowed Shor framework that replaces monolithic phase estimation with multiple shallow, overlapping QPE blocks and a carry-aware classical stitching layer, reducing the counting-qubit burden to a small fixed size while leaving the work register unchanged. The approach includes a non-standard initial target state to bias eigenstate amplitudes and robustly reconstructs the full phase via stitching and continued-fraction period recovery, with extensive numerical demonstrations on cases like , , and larger Ish. The combination of block-level parallelism, overlap-based redundancy, and lightweight classical postprocessing promises substantial practical gains for quantum factoring on near-term hardware and remains compatible with existing arithmetic-optimizations for overall efficiency.

Abstract

Shor's algorithm for integer factorization offers an exponential speedup over classical methods but remains impractical on Noisy Intermediate Scale Quantum (NISQ) hardware due to the need for many coherent qubits and very deep circuits. Building on our recent work on adaptive and windowed phase-estimation methods, we have developed a modular, windowed formulation of Shor's algorithm that mitigates these limitations by restructuring phase estimation into shallow, independent circuit blocks that can be executed sequentially or in parallel, followed by lightweight classical postprocessing. This approach allows for a reduction in the size of the phase (or counting) register from a large number of qubits down to a small, fixed block size of only a few qubits (for example, three or four phase qubits were sufficient for the computational examples considered in this work), while leaving the work register requirement unchanged. The independence of the blocks allows for parallel execution and makes the approach more compatible with near-term hardware than the standard Shor's formulation. An additional feature of the framework is the overlap mechanism, which introduces redundancy between blocks and enables robust reconstruction of phase information, though zero-overlap configurations can also succeed in certain regimes. Numerical simulations verify the correctness of the modular formulation while also showing substantial reductions in counting qubits per block.

Paper Structure

This paper contains 34 sections, 24 equations, 2 figures, 7 tables, 4 algorithms.

Figures (2)

  • Figure 1: Quantum circuits for each of the four blocks in the windowed QPE run for factoring $N=15$.
  • Figure 2: Quantum circuits for each of the four blocks in the windowed QPE run for factoring $N=221$.

Theorems & Definitions (7)

  • Remark 1
  • Remark 2
  • Remark 3
  • Remark 4
  • Remark 5
  • Remark 6
  • Remark 7