Block Encoding of Sparse Matrices via Coherent Permutation

Abstract

Block encoding of sparse matrices underpins powerful quantum algorithms such as quantum singular value transformation, Hamiltonian simulation, and quantum linear solvers, yet its efficient gate-level realization for general sparse matrices remains a major challenge. We introduce a unified framework that addresses key obstacles including the overhead of multi-controlled X (MCX) gates, amplitude reordering, and hardware connectivity, enabling simplified block encoding constructions with explicit gate-level implementations. Central to our approach is a connection to combinatorial optimization, which enables systematic assignment of control qubits to satisfy nearest-neighbor connectivity constraints, along with coherent permutation operators that preserve superposition while enabling structured amplitude reordering. We demonstrate our methods on structured sparse matrices, achieving systematic reductions in control overhead and circuit depth. Our framework bridges the gap between theoretical formulations and hardware-efficient quantum circuit implementations.

Figures (8)

• Figure 1: \ref{['fig:1a_Qubit_ordering']} Qubits of circuit $U$ are numbered in increasing order from top to bottom. \ref{['fig:1b_Qubit_ordering']} The matrix column register $|j\rangle = |j_{n-1}\cdots j_0\rangle$. The binary representation of an integer state $|j\rangle$ is assigned to qubits in decreasing order from top to bottom.
• Figure 2: Circuit structure for block encoding of sparse matrices. A single qubit is represented by a plain wire (del qubit), while multiple qubits are depicted as a wire marked with a short slash, labeled with the number of qubits it contains ($m$ for data qubits and $n$ for matrix qubits $|j\rangle$). The PREP and UNPREP blocks denote state-preparation operators. The oracles $O_{\text{shift}}$ and $O_{\text{del}}$ uses multi-controlled gates denoted by circle with a slash. The control values are determined by the respective state in binary representation \ref{['eq:Binary_rep']}, following the qubit ordering convention shown in \ref{['fig:1_Qubit_ordering']}.
• Figure 3: \ref{['fig:3a_Shifting']} Circuit illustration of left shift oracle $L(k, 0)$ (refer \ref{['eq:L_Shift']} with three matrix qubits $|j\rangle$ and $m$ data qubits. Here the control state is given by $|k\rangle$ and denoted by circle with a slash. \ref{['fig:3b_Shifting']} Similarly, circuit illustration of right shift oracle $R(k, 0)$ (refer \ref{['eq:R_Shift']}). \ref{['fig:3c_Shifting']} Left shift oracle of $k^{\text{th}}$ and $l^{\text{th}}$ data elements by two and four columns, respectively \ref{['fig:3d_Deletion']} Delete oracle $O_{\text{del}}$ illustrating deletion of $k^{\text{th}}$ data element from $r^{\text{th}}$ row (refer \ref{['eq:O_del']}).
• Figure 4: Consecutive left shift oracles $L(k, 0)L(l, 0)$ on three matrix qubits $|j\rangle$. The MCX gates can be grouped into three commuting compositions $\prod \text{MCX}_i$ (see \ref{['eq:MCX_composition']}).
• Figure 5: \ref{['fig:5a_Reduction']} Circuit representation of combined shift operation with permutation of amplitudes $\text{A\_PERMUTE}_\text{F}$ (represented by $\text{P}_{\text{F}}$). \ref{['fig:5b_Reduction']} Circuit for \ref{['example_1']}, showing the combined left shift of data elements $\{\psi_0, \psi_1\}$ in basis states $\{|00\rangle, |01\rangle\}$ by one column. \ref{['fig:5c_Reduction']} Circuit for \ref{['example_2']}, illustrating permutation of amplitudes and left shift of data elements $\{\psi_1, \psi_2\}$ by one column. \ref{['fig:5d_Reduction']} Circuit representation of combined deletion with permutation of rows $\text{P}_{\text{F}}$. \ref{['fig:5e_Reduction']} Circuit for \ref{['example_3']}, showing deletion of data element $|k\rangle$ in rows $\{|r_0\rangle, |r_1\rangle, |r_4\rangle, |r_7\rangle\}$. Note that the MCX gates here within $\text{P}_{\text{F}}$ can also be compressed, but retained to show the walk operator \ref{['definition:Permutation']}. \ref{['fig:5f_Reduction']} Circuit for \ref{['example_4']}, illustrating the insertion of data elements $\{|\psi_0\rangle, |\psi_1\rangle\}$ in rows $|r_a\rangle, |r_b\rangle$, respectively, along with $\text{P}_{\text{F}}$.

Theorems & Definitions (11)

• Theorem 1
• Theorem 2
• Theorem 3
• Definition 6.1
• Definition 6.2
• Theorem 4
• Example 7.1
• Example 7.2
• Example 7.3
• Example 7.4