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relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication

Michael Rogenmoser, Angelo Garofalo, Luca Benini

TL;DR

This work targets soft errors in tightly coupled on-chip interconnects by introducing relOBI, an extension of the Open Bus Interface (OBI) that provides complete soft-error tolerance at low latency. By triplicating handshake signals (with voting) and ECC-protecting data and control signals, relOBI enables continuous operation and in-flight error correction within a crossbar interconnect. Fault-injection and synthesis show relOBI eliminates single-fault vulnerability (from 34.85% to zero) with a 2.6× area increase—significantly lower than fine-grained triplication—while incurring manageable timing overhead. The approach, demonstrated on a 6×8 crossbar and made open-source, offers a practical path to higher system reliability in radiation-prone environments, such as space-based SoCs, without prohibitive area or timing penalties.

Abstract

On-chip communication is a critical element of modern systems-on-chip (SoCs), allowing processor cores to interact with memory and peripherals. Interconnects require special care in radiation-heavy environments, as any soft error within the SoC interconnect is likely to cause a functional failure of the whole SoC. This work proposes relOBI, an extension to the Open Bus Interface (OBI) combining triple modular redundancy (TMR) for critical handshake signals with error correction codes (ECC) protection on other signals. Implementing and testing the reliable crossbar shows improved reliability to injected single faults from a vulnerability of 34.85 % to zero compared to the irredundant baseline, with an area increase of 2.6 $\times$. The area overhead is 1.8 $\times$ lower than that reported in the literature for fine-grained triplication and voting.

relOBI: A Reliable Low-latency Interconnect for Tightly-Coupled On-chip Communication

TL;DR

This work targets soft errors in tightly coupled on-chip interconnects by introducing relOBI, an extension of the Open Bus Interface (OBI) that provides complete soft-error tolerance at low latency. By triplicating handshake signals (with voting) and ECC-protecting data and control signals, relOBI enables continuous operation and in-flight error correction within a crossbar interconnect. Fault-injection and synthesis show relOBI eliminates single-fault vulnerability (from 34.85% to zero) with a 2.6× area increase—significantly lower than fine-grained triplication—while incurring manageable timing overhead. The approach, demonstrated on a 6×8 crossbar and made open-source, offers a practical path to higher system reliability in radiation-prone environments, such as space-based SoCs, without prohibitive area or timing penalties.

Abstract

On-chip communication is a critical element of modern systems-on-chip (SoCs), allowing processor cores to interact with memory and peripherals. Interconnects require special care in radiation-heavy environments, as any soft error within the SoC interconnect is likely to cause a functional failure of the whole SoC. This work proposes relOBI, an extension to the Open Bus Interface (OBI) combining triple modular redundancy (TMR) for critical handshake signals with error correction codes (ECC) protection on other signals. Implementing and testing the reliable crossbar shows improved reliability to injected single faults from a vulnerability of 34.85 % to zero compared to the irredundant baseline, with an area increase of 2.6 . The area overhead is 1.8 lower than that reported in the literature for fine-grained triplication and voting.

Paper Structure

This paper contains 4 sections, 3 figures, 2 tables.

Table of Contents

  1. Introduction
  2. Architecture
  3. Results
  4. Conclusion

Figures (3)

  • Figure 1: Encoding and decoding between obi and relOBI, showing triplicated handshake signals and ecc protection for other signals.
  • Figure 2: Microarchitecture of a reliable relOBI crossbar, comprising demultiplexer (top, green) and multiplexer (bottom, blue) blocks and address decoders to select the target port (orange). For this 2$\times$2 crossbar, the secondary ports and modules are grey for clarity, however they have the same structure as the primary ports and modules.
  • Figure 3: Diagram illustrating the critical path through the tested design, with (a) representing the critical path in the base obi design, (b) in the relOBI design, and (c) the optimized relOBI design. Red blocks indicate the added logic for reliability.