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Trapping an Atomic Ion using Time-Division Multiplexed Digital-to-Analog Converters

Ryutaro Ohira, Masanari Miyamoto, Shinichi Morisaka, Ippei Nakamura, Atsushi Noguchi, Utako Tanaka, Takefumi Miyoshi

Abstract

Independent control of numerous electrodes in quantum charge-coupled device architectures presents a significant challenge for wiring and hardware scalability. To address this issue, we demonstrate a voltage control method based on time-division multiplexing (TDM). This approach utilizes a single high-update-rate digital-to-analog converter (DAC) to sequentially generate control signals for multiple electrodes, thereby reducing both the number of required DACs and associated wiring. We experimentally validate this concept by developing a 10-channel system that operates with only two DACs. The developed TDM-based voltage control system is applied to a surface-electrode trap, where we successfully trap a single $^{40}\mathrm{Ca}^+$ ion and demonstrate a simple ion transport primitive. This approach offers a resource-efficient and scalable solution for advanced quantum computing systems based on trapped ions.

Trapping an Atomic Ion using Time-Division Multiplexed Digital-to-Analog Converters

Abstract

Independent control of numerous electrodes in quantum charge-coupled device architectures presents a significant challenge for wiring and hardware scalability. To address this issue, we demonstrate a voltage control method based on time-division multiplexing (TDM). This approach utilizes a single high-update-rate digital-to-analog converter (DAC) to sequentially generate control signals for multiple electrodes, thereby reducing both the number of required DACs and associated wiring. We experimentally validate this concept by developing a 10-channel system that operates with only two DACs. The developed TDM-based voltage control system is applied to a surface-electrode trap, where we successfully trap a single ion and demonstrate a simple ion transport primitive. This approach offers a resource-efficient and scalable solution for advanced quantum computing systems based on trapped ions.

Paper Structure

This paper contains 2 sections, 1 equation, 5 figures, 1 table.

Figures (5)

  • Figure 1: (a) Conceptual diagram of the proposed control architecture. A TDM signal is generated by a DAC operating at an update rate of $N \times A$ updates per second (UPS), where $A$ is the effective update rate per output channel and $N$ is the number of channels. This multiplexed signal is transmitted to an in-vacuum demultiplexer (DEMUX), whose operation is governed by a logic signal labeled "Select Input". (b) Implementation of the demultiplexer. The design employs high-speed switches and voltage-storage capacitors. The switches, controlled by the Select Input logic signal, sequentially route the TDM signal to the capacitors. For example, Channel 1's switch is enabled at $t=0$, Channel 2's at $t=\Delta t$, and Channel $N$'s at $t=(N-1)\Delta t$, where $\Delta t = 1/NA$. Each capacitor retains its voltage for $\Delta T = N\Delta t = 1/A$ seconds between updates, reconstructing the desired waveform for each electrode. If needed, the signal is amplified to the target voltage using an operational amplifier.
  • Figure 2: (a) Photograph of the developed TDM-based voltage control system. (b) Block diagram of the system architecture. The system employs two 14-bit current-output DACs (AD9707), each time-multiplexing five analog control signals. These DACs are driven by an FPGA module (ZCU106), which generates the required TDM signals. Control operations are initiated from a host PC via Ethernet by executing Python scripts. The DAC output currents are converted to voltage signals using current-to-voltage converters based on OP-amps (AD8099). The resulting voltage signals are sequentially routed through high-speed switches (SN74AUC1G66DCKR) to charge dedicated capacitors. These capacitors retain the control voltages between TDM updates. Finally, the stored voltages are amplified by a second-stage OP-amp (THS4631).
  • Figure 3: (a) Circuit diagram of the second-stage voltage amplifier, using an OP-amp (THS4631) and a fixed reference voltage of 1.25 V. (b) Measured waveforms of a full-range sine signal on channel 1. The dashed curve shows $V_{\text{in}}$ immediately after the analog switch, while the solid curve shows $V_{\text{out}}$ after final-stage amplification. Clipping is observed near 14.2 V. A sinusoidal fit to the unclipped region (dash-dot curve) estimates the peak voltage at 15.8 V. (c) Measured voltage hold behavior at the output of channel 1. An exponential fit to the decay between -45 ms and 300 ms yields a time constant of 233(1) ms. The time axes in (b) and (c) represent raw oscilloscope time values.
  • Figure 4: (a) Schematic of the experimental setup (not to scale), showing the surface-electrode trap with two RF electrodes and eleven DC electrodes. The developed TDM-based voltage control system drives the ten side DC electrodes. Control voltages pass through low-pass filters (LPFs) before entering the vacuum chamber via vacuum feedthroughs and reaching the electrodes. (b) Fluorescence image of a single $^{40}\mathrm{Ca}^+$ ion trapped in the surface electrode trap. Each pixel corresponds to approximately 0.4 $\mu$m. (c) Shuttling of a single $^{40}\mathrm{Ca}^+$ ion. The white arrow indicates the ion shuttling direction along the $-z$ axis. The ion is transported by a time-dependent voltage generated by the TDM-based control system and applied to ten side DC electrodes. The applied waveform consists of eleven discrete voltage steps with an update interval of 500 ms.
  • Figure 5: Schematic circuit architecture enabling TDM-based voltage control in a cryogenic environment.