Transferable Parasitic Estimation via Graph Contrastive Learning and Label Rebalancing in AMS Circuits

TL;DR

CircuitGCL tackles the transferability challenge in AMS circuit parasitic estimation under data scarcity and label imbalance by fusing Representation Scattering Mechanism with graph contrastive learning and introducing BMSE/BSCE label rebalancing. The framework learns topology-invariant, hyperspherical node embeddings via a target-online encoder setup with EMA updates, enabling zero-shot transfer to unseen circuit topologies. Empirical results on edge regression and node classification across multiple 28nm AMS designs show substantial improvements over state-of-the-art methods, with $R^2$ gains up to $\sim$44% and $F1$ gains up to $\sim$2.1x, demonstrating strong cross-design generalization. These advances offer a practical path to pre-layout parasitic estimation and broader, data-efficient EDA tooling for heterogeneous AMS designs.

Abstract

Graph representation learning on Analog-Mixed Signal (AMS) circuits is crucial for various downstream tasks, e.g., parasitic estimation. However, the scarcity of design data, the unbalanced distribution of labels, and the inherent diversity of circuit implementations pose significant challenges to learning robust and transferable circuit representations. To address these limitations, we propose CircuitGCL, a novel graph contrastive learning framework that integrates representation scattering and label rebalancing to enhance transferability across heterogeneous circuit graphs. CircuitGCL employs a self-supervised strategy to learn topology-invariant node embeddings through hyperspherical representation scattering, eliminating dependency on large-scale data. Simultaneously, balanced mean squared error (BMSE) and balanced softmax cross-entropy (BSCE) losses are introduced to mitigate label distribution disparities between circuits, enabling robust and transferable parasitic estimation. Evaluated on parasitic capacitance estimation (edge-level task) and ground capacitance classification (node-level task) across TSMC 28nm AMS designs, CircuitGCL outperforms all state-of-the-art (SOTA) methods, with the $R^2$ improvement of $33.64\% \sim 44.20\%$ for edge regression and F1-score gain of $0.9\times \sim 2.1\times$ for node classification. Our code is available at https://github.com/ShenShan123/CircuitGCL.

Figures (7)

• Figure 1: NN-based DL model has poor transferability due to circuit heterogeneity.
• Figure 2: Workflow of CircuitGCL. (a) During training, a target encoder applies a Representation Scattering Mechanism (RSM) to generate scattered embeddings ($\mathbf{H}_{\text{target}}$), while an online encoder produces embeddings ($\mathbf{H}_{\text{online}}$) that are passed to a downstream GNN. To improve transferability, a label rebalancing module adjusts the final loss based on the training label distribution, $p_{\text{train}}(\boldsymbol{y})$. (b) During testing, only the trained online encoder and downstream GNN are utilized to generate predictions ($\boldsymbol{y}_{\text{pred}}$).
• Figure 3: t-SNE visualizations of node embeddings: comparisons between models with and without the GCL framework. Darker indicates larger parasitic capacitance.
• Figure 4: Normalized label distributions of all AMS circuit datasets.
• Figure 5: $R^2$ and F1 improvements of applying RSM to regression and classification tasks, respectively.

Theorems & Definitions (3)

• Definition 1: Representation Scattering
• Definition 2: Balanced MSE
• Definition 3: Balanced Softmax CE