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A Cost-Effective Layout-Aware Quantum Circuit Synthesis For Triangular, Square, and Heavy-Hex Layouts

Sonia Yang, Ali Al-Bayaty, Marek Perkowski

TL;DR

The paper addresses the high cost of mapping circuits with large $n$-bit Toffoli gates onto practical quantum layouts such as square grids and heavy-hex. It introduces Positive Davio Lattices (PDLs) as an intermediate representation and the SWAT gate (a SWAP followed by a 3-bit Toffoli) to enable layout-aware synthesis, including a novel triangular layout derived from PDL circuits. The authors demonstrate cost benefits through seven ESOP comparison examples, showing reduced Maslov costs and transpilation quantum costs (TQC), especially for symmetric functions, and they show mappings to square grid and heavy-hex layouts with no extra global SWAPs when using SWAT-based designs. This approach offers a practical path to more cost-effective quantum circuit deployment on near- and mid-term devices, with potential extensions to multi-output functions and alternative lattice-based layouts.

Abstract

The quantum layout and the mapping of logical to physical qubits are crucial in quantum circuit synthesis for a real quantum computer. Circuits that include large $n$-bit Toffoli gates ($n \geq 3$), such as those designed from cost-expensive gates and hard-to-decompose Exclusive-or Sum of Products (ESOP) expressions, have complications of effective mappings into contemporary quantum layouts, such as the square grid and heavy-hex layouts. These complications are primarily caused by the limited connectivity among the physical qubits in such layouts, leading to the insertion of many additional SWAP gates. This paper introduces a new quantum circuit synthesis methodology by exploring the advantage of a Positive Davio lattice (PDL) as an intermediate representation to create our proposed triangular layout and layout-aware circuits. From these circuits, we introduce and form the SWAT gate, composed of a SWAP gate followed by a 3-bit Toffoli gate. To illustrate the usefulness of our method for existing industrial quantum layouts, we also introduce cost-effective mappings of the resulting circuits onto square grid and heavy-hex layouts without additional SWAP gates. This is done with the help of the SWAT gate. Our research highlights PDLs as an efficient tool for layout-aware quantum circuit synthesis.

A Cost-Effective Layout-Aware Quantum Circuit Synthesis For Triangular, Square, and Heavy-Hex Layouts

TL;DR

The paper addresses the high cost of mapping circuits with large -bit Toffoli gates onto practical quantum layouts such as square grids and heavy-hex. It introduces Positive Davio Lattices (PDLs) as an intermediate representation and the SWAT gate (a SWAP followed by a 3-bit Toffoli) to enable layout-aware synthesis, including a novel triangular layout derived from PDL circuits. The authors demonstrate cost benefits through seven ESOP comparison examples, showing reduced Maslov costs and transpilation quantum costs (TQC), especially for symmetric functions, and they show mappings to square grid and heavy-hex layouts with no extra global SWAPs when using SWAT-based designs. This approach offers a practical path to more cost-effective quantum circuit deployment on near- and mid-term devices, with potential extensions to multi-output functions and alternative lattice-based layouts.

Abstract

The quantum layout and the mapping of logical to physical qubits are crucial in quantum circuit synthesis for a real quantum computer. Circuits that include large -bit Toffoli gates (), such as those designed from cost-expensive gates and hard-to-decompose Exclusive-or Sum of Products (ESOP) expressions, have complications of effective mappings into contemporary quantum layouts, such as the square grid and heavy-hex layouts. These complications are primarily caused by the limited connectivity among the physical qubits in such layouts, leading to the insertion of many additional SWAP gates. This paper introduces a new quantum circuit synthesis methodology by exploring the advantage of a Positive Davio lattice (PDL) as an intermediate representation to create our proposed triangular layout and layout-aware circuits. From these circuits, we introduce and form the SWAT gate, composed of a SWAP gate followed by a 3-bit Toffoli gate. To illustrate the usefulness of our method for existing industrial quantum layouts, we also introduce cost-effective mappings of the resulting circuits onto square grid and heavy-hex layouts without additional SWAP gates. This is done with the help of the SWAT gate. Our research highlights PDLs as an efficient tool for layout-aware quantum circuit synthesis.

Paper Structure

This paper contains 19 sections, 11 equations, 44 figures, 4 tables.

Figures (44)

  • Figure 1: The Positive Davio expansion realized with a Toffoli gate.
  • Figure 2: Two levels of a PDL showing a single Positive Davio expansion: $f = f_{\bar{a}} \oplus a(f_{\bar{a}} \oplus f_a)$.
  • Figure 3: Merging the middle nodes of two adjacent expansions using the XOR operation.
  • Figure 4: Levels of the PDL for $f = 1 \oplus ad \oplus bd \oplus abd \oplus ac \oplus bc \oplus cd \oplus bcd.$
  • Figure 5: PDL for $f = 1 \oplus ad \oplus bd \oplus abd \oplus ac \oplus bc \oplus cd \oplus bcd$.
  • ...and 39 more figures