Supercurrent modulation in InSb nanoflag-based Josephson junctions by scanning gate microscopy

Abstract

InSb nanoflags represent an interesting platform for quantum transport and have recently been exploited in the study of hybrid planar Josephson junctions. Due to the uncovered semiconductor surface, they are also good candidates for surface probe techniques. Here, we report the first Scanning Gate Microscopy (SGM) experiments on Nb-contacted InSb nanoflag-based Josephson junctions. In the normal state, sizable conductance modulation via the charged tip of the SGM is recorded. In the superconducting state, we report the first application of Scanning Gate Microscopy to superconducting weak links, demonstrating the possibility of manipulating the supercurrent flow across a semiconductor-superconductor heterostructure at a local level. The experimental findings are consistent with theoretical predictions and establish a new way of investigating the behavior of superconducting weak links, towards the local imaging of supercurrent flow.

Figures (3)

• Figure 1: (a) Graphical representation of a Scanning Gate Microscopy experiment. The light blue section corresponds to the exposed semiconducting region of the nanoflag. (b) Conductance modulation of device SC6 versus back gate voltage. The back gate working point $V_{bg} = 3V$ is indicated by a red x. The numerical least squares fit of the rising slope in proximity to the working point with a linear model is indicated by the red dashed line. (c) Conductance map as a function of tip position acquired in dual pass mode with a $60nm$ tip offset with respect to the topography scan. Working point: $V_{tip} = 10V$, $V_{bg} = 3V$. (d) Conductance map acquired in the same conditions as in (c), but with $V_{tip} = -10V$.
• Figure 2: (a) Scanning Electron Microscopy (SEM) image of device SGM1 D8D2. The blue scalebar corresponds to $1\mu m$ (b) Critical current as a function of back gate voltage. The green line indicates the position of the working point $V_{bg} = 9.5V$. The red line shows to the best linear fit of the critical current modulation by the back gate in the neighborhood of the working point. (c) Current-voltage curve of device SGM1 D8D2 at $V_{bg} = 20V$. (d) Differential resistance map as a function of back gate voltage and current bias.
• Figure 3: (a) Critical current as a function of tip-to-sample voltage difference $V_{tip}$ when the tip is placed close to the geometrical centre of the junction; the best linear fit to the displayed data is shown in orange, while the result of numerical simulations is reported in green. (b) SGM map measurement: $20$ pixel $\times$$20$ pixel critical current map as a function of the position of the tip. $V_{tip} = -10V$, $V_{bg} = 9.5V$. (c) Numerical simulation of tip-induced critical current modulation map (details on the theoretical model can be found in S4 of the Supplemental Material).