Tour de gross: A modular quantum computer based on bivariate bicycle codes

TL;DR

<3-5 sentence high-level summary> The paper introduces the bicycle architecture, a modular quantum computer built from bivariate bicycle LDPC codes and long-range inter-module couplings to reduce physical qubit overhead. It provides explicit fault-tolerant implementations for two codes (gross and two-gross), along with a complete compilation strategy that maps Clifford+P circuits into a universal bicycle instruction set that includes T-state injections. End-to-end resource estimates demonstrate that, for fixed physical resources and error rates, the bicycle architecture can implement substantially larger logical circuits than conventional surface-code architectures, with TFIM and random-circuit benchmarks illustrating potential practical impact. The work also outlines future directions in code constructions, scheduling, and connectivity to further close the gap to scalable quantum computing in hardware platforms with long-range couplings.

Abstract

We present the bicycle architecture, a modular quantum computing framework based on high-rate, low-overhead quantum LDPC codes identified in prior work. For two specific bivariate bicycle codes with distances 12 and 18, we construct explicit fault-tolerant logical instruction sets and estimate the logical error rate of the instructions under circuit noise. We develop a compilation strategy adapted to the constraints of the bicycle architecture, enabling large-scale universal quantum circuit execution. Integrating these components, we perform end-to-end resource estimates demonstrating that an order of magnitude larger logical circuits can be implemented with a given number of physical qubits on the bicycle architecture than on surface code architectures. We anticipate further improvements through advances in code constructions, circuit designs, and compilation techniques.

Figures (18)

• Figure 1: Quantum architectures
• Figure 2: Logical capability estimates
• Figure 4: Module components. Different module connectivity can be considered, such as \ref{['fig:linearConnectivity']} a linear arrangement and \ref{['fig:triangleConnectivity']} a triangular arrangement. Each physical qubit is part of exactly one of the pictured components: a code $c$, an LPU $u$, a factory $f$, a code-code adapter $a$, or a code-factory adapter $a'$. Bicycle Circuit.\ref{['fig:bicycleInstructions']} An example circuit expressed in the universal set of bicycle instructions. Each code module hosts $k=12$ logical qubits (black wires). Multi-qubit Pauli measurements (square boxes) are allowed: (i) between the first and seventh qubits within a module (duration $\tau_{\mathrm M}$), or (ii) between the first and seventh qubits of two connected modules (duration $\tau_{\mathrm C}$; red highlight). A T factory can inject a T state on the first or seventh qubit of any adjacent code module over time $\tau_{\mathrm T} \geq \tau_{\mathrm C}$ (blue highlight), during which the factory is occupied. Shift automorphisms can be applied, each acting as $U_i \otimes U_i$ on the 12 logical qubits in a code where $U_i$ is a six-qubit unitary (duration $\tau_U$).
• Figure 5: \ref{['fig:unit_cell']} We can build our BB codes from unit cells, which each contain two checks and two qubits. A line drawn between a qubit and an $X$($Z$) check indicates that the check acts non-trivially on that qubit with Pauli $X$($Z$). \ref{['fig:gross_code']} The gross code is built by assembling unit cells in a $12\times 6$ grid on the surface of the torus. Only four example long-range connections are drawn, but these can be extrapolated to all unit cells by translational symmetry so that each qubit and check participates in two long-range connections. Qubits in logical operators $\bar{X}_1$, $\bar{X}_7$, $\bar{Z}_1$, and $\bar{Z}_7$ are labeled $X_1$, $X_7$, $Z_1$, and $Z_7$, respectively. Where $\bar{X}_1$ and $\bar{Z}_1$ (resp. $\bar{X}_7$ and $\bar{Z}_7$) overlap, the qubit is labeled $Y_1$ (resp. $Y_7$). These logical operators and their shifts generate the full 12-qubit logical Pauli group.
• Figure 6: \ref{['fig:syndromeCircuit']} An example of the standard circuit for measuring a Pauli check using just one check qubit prepared in $\ket{+}$ and measured out in the $X$ basis along with controlled-$X$ and controlled-$Z$ gates. We depict a Tanner (sub)graph on the left in which data qubits are drawn as circles, check qubits drawn as squares, and edges are color coded red and green to indicate Pauli $X$ and $Z$ support of the check, respectively. The connectivity of the Tanner graph matches the connectivity required for gates in the circuit. \ref{['fig:tannerGraph']} A representative Tanner subgraph of a BB code as in \ref{['fig:gross_code']} with edges labeled with the timestep in which gates are scheduled. It should be understood that the $Z$ check qubit is initialized in timestep 0 and measured in timestep 7. Similarly, the $X$ check qubit is initialized in timestep 1 and measured in timestep 8. While the $X$ check is measured, the $Z$ check is reinitialized for the next syndrome cycle. From just this subgraph, the schedule for the whole BB code can be extrapolated by translational symmetry. \ref{['fig:bellCheck']} The same check measurement from (a) can be performed in fewer timesteps (indexed across the top) and reduced check node degree by preparing a Bell state instead, indicated by a wavy line between check nodes. The check measurement is the parity of the two $X$ measurements. We sometimes refer to a check measured this way as a Bell check.