ePC: Fast and Deep Predictive Coding for Digital Hardware
Cédric Goemaere, Gaspard Oliviers, Rafal Bogacz, Thomas Demeester
TL;DR
This work identifies a fundamental inefficiency in state-based Predictive Coding (sPC) arising from exponential signal decay when simulated on digital hardware. It introduces error-based PC (ePC), a reparameterization that uses prediction errors $oldsymbol{ε}$ as the primary optimization variables, yielding global connectivity and eliminating depth-related attenuation while preserving the same equilibrium as sPC, i.e., the same weight gradients at convergence. Empirically, ePC converges orders of magnitude faster than sPC and matches backpropagation performance across deep architectures and multiple datasets, addressing a key barrier to scaling PC on digital hardware. The findings provide a theoretical and practical foundation for scalable PC-based learning and outline avenues for applying PC in neuromorphic contexts and domain-specific learning tasks.
Abstract
Predictive Coding (PC) offers a brain-inspired alternative to backpropagation for neural network training, described as a physical system minimizing its internal energy. However, in practice, PC is predominantly digitally simulated, requiring excessive amounts of compute while struggling to scale to deeper architectures. This paper reformulates PC to overcome this hardware-algorithm mismatch. First, we uncover how the canonical state-based formulation of PC (sPC) is, by design, deeply inefficient in digital simulation, inevitably resulting in exponential signal decay that stalls the entire minimization process. Then, to overcome this fundamental limitation, we introduce error-based PC (ePC), a novel reparameterization of PC which does not suffer from signal decay. Though no longer biologically plausible, ePC numerically computes exact PC weights gradients and runs orders of magnitude faster than sPC. Experiments across multiple architectures and datasets demonstrate that ePC matches backpropagation's performance even for deeper models where sPC struggles. Besides practical improvements, our work provides theoretical insight into PC dynamics and establishes a foundation for scaling PC-based learning to deeper architectures on digital hardware and beyond.
