ARM SVE Unleashed: Performance and Insights Across HPC Applications on Nvidia Grace

TL;DR

The paper addresses the readiness of ARM SVE for HPC by profiling 13 diverse workloads on Nvidia Grace and applying an adapted roofline model to quantify vectorization impact. It introduces metrics such as the vectorization bound $VB = \frac{VLEN}{ELEN}$ and the instruction-reduction ratio $R_{ins\_reduction}$, plus a roofline-based diagnostic with inflection points $AI_{IRR}$ and $AI_{IRV}$ to distinguish compute- from memory-bound kernels. A 26-case classification via a decision tree reveals that 15 cases achieve speedup without porting, while others are memory-bound or non-vectorizable, with SpMV showcasing SVE's strength for irregular loops. The findings suggest single-precision workloads benefit most from SVE on Grace, whereas double-precision HPC tasks face challenges due to shorter vector lengths and memory bandwidth, guiding future design of memory systems, compilers, and HPC software for vector-length agnostic architectures.

Abstract

Vector architectures are essential for boosting computing throughput. ARM provides SVE as the next-generation length-agnostic vector extension beyond traditional fixed-length SIMD. This work provides a first study of the maturity and readiness of exploiting ARM and SVE in HPC. Using selected performance hardware events on the ARM Grace processor and analytical models, we derive new metrics to quantify the effectiveness of exploiting SVE vectorization to reduce executed instructions and improve performance speedup. We further propose an adapted roofline model that combines vector length and data elements to identify potential performance bottlenecks. Finally, we propose a decision tree for classifying the SVE-boosted performance in applications.

Figures (8)

• Figure 1: SVE supports variable vector length by masking predicate registers.
• Figure 2: Assembly code of a simple vector-vector addition kernel.
• Figure 3: Measured metrics in the 11 workloads that can be autovectorized using SVE and SIMD, respectively.
• Figure 4: Measured metrics in 13 workloads using SVE on Nvidia Grace processor at single and 72 threads.
• Figure 5: The speedup in the quantum circulation simulation.