Spatially Mapping Phonon Drag in Ultrascaled 5-nm Silicon Nanowire Field-Effect Transistor Based on a Quantum Hydrodynamic Formalism

TL;DR

This work advances nanoscale electrothermal modeling by developing a coupled quantum hydrodynamic framework that integrates density‑gradient electron transport (QDD) with phonon hydrodynamics (PHE) to capture phonon drag and self‑heating in ultrascaled 5‑nm Si gate‑all‑around nanowire FETs. The model uses a nonlocal, non‑Fourier description of heat transport and a Bohm‑type quantum potential to describe quantum corrections, enabling accurate predictions of transfer characteristics and temperature distributions under high bias. Key findings show that phonon drag can reduce thermal conductivity by up to ~50% and drive hot spots near the drain, with NEGF benchmarks demonstrating good agreement while classical models fail to capture these effects. The framework provides spatial maps of phonon‑drag intensity and offers a scalable tool for designing cooling strategies in future nanoscale CMOS technologies.

Abstract

The growing demand for better performance and lower thermal energy dissipation in nanoelectronic devices is the major driving force of the semiconductor industry's quest for future generations of nanotransistors. Over the past 15 years, the miniaturization of silicon-based nanoelectronics predicted by Moore's law has driven an aggressive scaling down of transistor structures, including materials, design, and geometries. In this regard, the electronic device community has expanded its focus to ultrascaled transistors targeting the 7 nm technology node and beyond. However, these emerging nanodevices also present thermal challenges that can limit carrier transport as a result of strong electron-phonon coupling. In this work, we investigate the physical origin of self-heating effects in an ultrascaled 5 nm silicon nanowire field-effect transistor. Based on a quantum hydrodynamic approach, we also provide an explanation of the phonon drag contribution to thermal conductivity. We report the impact of the phonon drag effect on the electrical and thermal performance of 5 nm gate-all-around silicon nanowire field-effect transistors. Our findings provide new insight into the origin of self-heating as a result of mutual electron-phonon coupling. Furthermore, we demonstrate that the phonon drag effect significantly reduces thermal conductivity by nearly 50% under high-bias conditions.

Figures (10)

• Figure 1: Multiscale carrier transport in Knudsen regime.
• Figure 2: Schematic representation of ultrafast thermal transport in nanoscale FETs. Here, $x_{\mathrm{NW}}$ denotes the longitudinal coordinate of the nanowire axis.
• Figure 3: (a) Electron--phonon (e-ph) interaction in ultrascaled gate-all around field-effect transistor. (b) Numerical scheme for quantum hydrodynamic formalism.
• Figure 4: Comparison of normalized thermal conductivity of silicon nanofilms as a function of the system length ($L$, defined as the distance between the hot and cold sides). The dashed line indicates the diffusive limit, $\kappa_{\text{eff}}/\kappa_{\text{Bulk}} = 1$. The plot also includes previously reported size-dependent thermal conductivities from theoretical models and experiments for comparison.
• Figure 5: (a) Transfer characteristics at $V_{DS}=0.6$ V for the ultrascaled Si GAA NWFET with HfO$_2$ gate oxide. Short dashed lines denote the NEGF with standard scattering (i.e., without self-heating effects) and nanoscale transistors 24. (b) Temperature distribution along the nanowire axis at $V_{GS}=0.4$ V and $V_{DS}=0.6$ V. Here, the classical DD is coupled with Fourier's law. Data from 24 are only included for comparison.