Accelerating Triangle Counting with Real Processing-in-Memory Systems

TL;DR

This paper tackles triangle counting on memory-bound graphs by deploying a real Processing-in-Memory (PIM) system (UPMEM) and introducing a suite of techniques to fit hardware constraints. It combines vertex coloring to partition work (across $C$ colors), reservoir sampling at the PIM cores, uniform sampling at the host, and Misra-Gries to handle high-degree nodes, together with a merge-like counting method for COO-form graphs. The authors present the first TC algorithm on a real PIM platform, provide extensive evaluations across diverse graphs, and compare against CPU and GPU baselines, highlighting PIM’s viability for dynamic graphs. Overall, the work demonstrates meaningful speedups over CPU on dynamic graph workloads, while acknowledging that GPUs still lead on static graphs, thereby outlining a concrete path toward scalable, memory-analytic graph processing in near-memory architectures.

Abstract

Triangle Counting (TC) is a procedure that involves enumerating the number of triangles within a graph. It has important applications in numerous fields, such as social or biological network analysis and network security. TC is a memory-bound workload that does not scale efficiently in conventional processor-centric systems due to several memory accesses across large memory regions and low data reuse. However, recent Processing-in-Memory (PIM) architectures present a promising solution to alleviate these bottlenecks. Our work presents the first TC algorithm that leverages the capabilities of the UPMEM system, the first commercially available PIM architecture, while at the same time addressing its limitations. We use a vertex coloring technique to avoid expensive communication between PIM cores and employ reservoir sampling to address the limited amount of memory available in the PIM cores' DRAM banks. In addition, our work makes use of the Misra-Gries summary to speed up counting triangles on graphs with high-degree nodes and uniform sampling of the graph edges for quicker approximate results. Our PIM implementation surpasses state-of-the-art CPU-based TC implementations when processing dynamic graphs in Coordinate List format, showcasing the effectiveness of the UPMEM architecture in addressing TC's memory-bound challenges.

Figures (7)

• Figure 1: Partitioning of the graph's edges among the PIM cores through the host processor.
• Figure 2: Representation of a subgraph assigned to a PIM core inside its DRAM bank.
• Figure 3: Throughput (edges per millisecond) when counting triangles in different graphs, ordered by their maximum node's degree (lowest first).
• Figure 4: Performance scaling when changing the number of PIM cores and the number of colors (between brackets) used to partition the graphs. The number of threads used by the host processor is 32.
• Figure 5: Performance results when changing the parameters $K$ and $t$ used by the Misra-Gries summary.