CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design

TL;DR

CircuitFusion addresses rising IC design costs by introducing a multimodal, implementation-aware circuit encoder that fuses HDL code, circuit graph, and functionality summaries, complemented by an implementation-aware netlist alignment. Leveraging four circuit properties—parallel execution, functional equivalence, multi-stage design, and reusability—the model uses four training strategies and a retrieval-augmented inference flow to learn robust, cross-modal representations. It employs Graphormer for graphs, a frozen NV-Embed-V1 code encoder, a summary transformer, and cross-attention fusion, plus an auxiliary netlist encoder, trained with four self-supervised tasks and an alignment objective. Evaluated on five downstream design-quality tasks, CircuitFusion consistently surpasses task-specific baselines and demonstrates zero-shot and few-shot capabilities, highlighting its generalizability and potential to accelerate agile chip design. The results also indicate favorable scalability with larger models and bigger pre-training datasets, suggesting strong potential as a circuit foundation model.

Abstract

The rapid advancements of AI rely on the support of ICs. However, the growing complexity of digital ICs makes the traditional IC design process costly and time-consuming. In recent years, AI-assisted IC design methods have demonstrated great potential, but most methods are task-specific or focus solely on the circuit structure in graph format, overlooking other circuit modalities with rich functional information. In this paper, we introduce CircuitFusion, the first multimodal and implementation-aware circuit encoder. It encodes circuits into general representations that support different downstream circuit design tasks. To learn from circuits, we propose to fuse three circuit modalities: hardware code, structural graph, and functionality summary. More importantly, we identify four unique properties of circuits: parallel execution, functional equivalent transformation, multiple design stages, and circuit reusability. Based on these properties, we propose new strategies for both the development and application of CircuitFusion: 1) During circuit preprocessing, utilizing the parallel nature of circuits, we split each circuit into multiple sub-circuits based on sequential-element boundaries, each sub-circuit in three modalities. 2) During CircuitFusion pre-training, we introduce three self-supervised tasks that utilize equivalent transformations both within and across modalities. 3) When applying CircuitFusion to downstream tasks, we propose a new retrieval-augmented inference method, which retrieves similar known circuits as a reference for predictions. It improves fine-tuning performance and even enables zero-shot inference. Evaluated on five different circuit design tasks, CircuitFusion consistently outperforms the SOTA supervised method specifically developed for every single task, demonstrating its generalizability and ability to learn circuits' inherent properties.

Figures (10)

• Figure 1: Preview of results on the effectiveness of proposed strategies and circuit modalities.
• Figure 2: Multimodal and multi-stage circuit preprocessing flow. We split circuits into sub-circuits for fine-grained encoding, representing RTL in three modalities (HDL code, functionality summary, and graph) and netlists as graphs, ensuring data alignment across modalities and design stages.
• Figure 3: CircuitFusion pre-training workflow. CircuitFusion includes three unimodal encoders (graph, summary, and code) and a multimodal fusion encoder, with an auxiliary netlist encoder used only in pre-training. Leveraging the circuit’s unique properties, we propose four tasks to capture structural and semantic information, while aligning the netlist stage for implementation awareness.
• Figure 4: CircuitFusion retrieval-augmented inference flow. For downstream tasks, CircuitFusion retrieves the most similar known circuits as references to improve fine-tuning and enable zero-shot.
• Figure 5: Visualization of cross attention between summary and code/graph.