The Open-Source BlackParrot-BedRock Cache Coherence System
Mark Unruh Wyse
TL;DR
The work investigates introducing programmability into the cache coherence subsystem of modern shared-memory multicore processors, framing BedRock as a practical, low-complexity MOESIF-based protocol and BP-BedRock as an open-source BlackParrot implementation. It demonstrates two coherence-directory realizations—a fixed-function FSM CCE and a microcode-programmable ucode CCE—plus a hybrid architecture that combines programmable pipes with fixed-function processing, showing that programmability can achieve flexibility with modest area and latency overheads. Across hardware implementations and application benchmarks, the fixed-function design yields best performance, the microcode approach incurs modest area costs but can deliver competitive results in certain workloads, and the hybrid engine offers a robust blend of performance and adaptability, often outperforming pure fixed-function or pure programmable variants in practice. The results substantiate that a well-architected programmable coherence engine can approach fixed-function performance while enabling system-specific features, and they provide a fully open-source blueprint for future research into programmable coherence for heterogeneous, open architectures. Overall, the work advances understanding of coherence design tradeoffs, proves the feasibility of open-source programmable coherence, and identifies concrete directions for leveraging programmability to enhance adaptability, security, and debugging in multicore systems.
Abstract
This dissertation revisits the topic of programmable cache coherence engines in the context of modern shared-memory multicore processors. First, the open-source BedRock cache coherence protocol is described. BedRock employs the canonical MOESIF coherence states and reduces implementation burden by eliminating transient coherence states from the protocol. The protocol's design complexity, concurrency, and verification effort are analyzed and compared to a canonical directory-based invalidate coherence protocol. Second, the architecture and microarchitecture of three separate cache coherence directories implementing the BedRock protocol within the BlackParrot 64-bit RISC-V multicore processor, collectively called BlackParrot-BedRock (BP-BedRock), are described. A fixed-function coherence directory engine implementation provides a baseline design for performance and area comparisons. A microcode-programmable coherence directory implementation demonstrates the feasibility of implementing a programmable coherence engine capable of maintaining sufficient protocol processing performance. A hybrid fixed-function and programmable coherence directory blends the protocol processing performance of the fixed-function design with the programmable flexibility of the microcode-programmable design. Collectively, the BedRock coherence protocol and its three BP-BedRock implementations demonstrate the feasibility and challenges of including programmable logic within the coherence system of modern shared-memory multicore processors, paving the way for future research into the application- and system-level benefits of programmable coherence engines.