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Ariel OS: An Embedded Rust Operating System for Networked Sensors & Multi-Core Microcontrollers

Elena Frank, Kaspar Schleiser, Romain Fouquet, Koen Zandberg, Christian Amsüss, Emmanuel Baccelli

TL;DR

Ariel OS addresses the gap of Rust-based embedded operating systems supporting multicore preemptive scheduling on 32-bit MCUs by delivering a global, SMP-capable scheduler with tight hardware abstraction and async Rust integration. Built on a tickless, preemptive single-core baseline, it extends to multicore with support for core reallocation and dynamic thread selection, plus priority inheritance and safe synchronization. Micro-benchmarks on RP2040, RP2350, and ESP32-S3 show the dynamic thread selection variant yields the best performance with modest multicore overhead, and matrix-multiplication tests approach a near 2x speedup for large problems, despite memory bus contention. The project emphasizes portability, transparency, and practical applicability for small networked devices, providing open-source code and a unified platform for research and industry practice in secure, distributed MCU software.

Abstract

Large swaths of low-level system software building blocks originally implemented in C/C++ are currently being swapped for equivalent rewrites in Rust, a relatively more secure and dependable programming language. So far, however, no embedded OS in Rust supports multicore preemptive scheduling on microcontrollers. In this paper, we thus fill this gap with a new operating system: Ariel OS. We describe its design, we provide the source code of its implementation, and we perform micro-benchmarks on the main 32-bit microcontroller architectures: ARM Cortex-M, RISC-V and Espressif Xtensa. We show how our scheduler takes advantage of several cores, while incurring only small overhead on single-core hardware. As such, Ariel OS provides a convenient embedded software platform for small networked devices, for both research and industry practitioners.

Ariel OS: An Embedded Rust Operating System for Networked Sensors & Multi-Core Microcontrollers

TL;DR

Ariel OS addresses the gap of Rust-based embedded operating systems supporting multicore preemptive scheduling on 32-bit MCUs by delivering a global, SMP-capable scheduler with tight hardware abstraction and async Rust integration. Built on a tickless, preemptive single-core baseline, it extends to multicore with support for core reallocation and dynamic thread selection, plus priority inheritance and safe synchronization. Micro-benchmarks on RP2040, RP2350, and ESP32-S3 show the dynamic thread selection variant yields the best performance with modest multicore overhead, and matrix-multiplication tests approach a near 2x speedup for large problems, despite memory bus contention. The project emphasizes portability, transparency, and practical applicability for small networked devices, providing open-source code and a unified platform for research and industry practice in secure, distributed MCU software.

Abstract

Large swaths of low-level system software building blocks originally implemented in C/C++ are currently being swapped for equivalent rewrites in Rust, a relatively more secure and dependable programming language. So far, however, no embedded OS in Rust supports multicore preemptive scheduling on microcontrollers. In this paper, we thus fill this gap with a new operating system: Ariel OS. We describe its design, we provide the source code of its implementation, and we perform micro-benchmarks on the main 32-bit microcontroller architectures: ARM Cortex-M, RISC-V and Espressif Xtensa. We show how our scheduler takes advantage of several cores, while incurring only small overhead on single-core hardware. As such, Ariel OS provides a convenient embedded software platform for small networked devices, for both research and industry practitioners.
Paper Structure (23 sections, 5 figures)

This paper contains 23 sections, 5 figures.

Figures (5)

  • Figure 1: Threading startup on a dual-core system.
  • Figure 2: Context switching performance of the two multicore scheduler designs compared with single-core configuration.
  • Figure 3: Overhead of the multicore scheduling feature, measured on single-core hardware.
  • Figure 4: Multiplication of $N\times N$ matrices, $N\in\{10, 20, ..., 80\}$
  • Figure 5: Ariel OS architecture diagram.