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Generalized Restart Mechanism for Successive-Cancellation Flip Decoding of Polar Codes

Ilshat Sagitov, Charles Pillet, Alexios Balatsoukas-Stimming, Pascal Giard

TL;DR

This work tackles the latency challenge of flip-based polar-code decoders by introducing a Generalized Restart Mechanism (GRM) that skips redundant decoding between trials. By restarting at a targeted location $\psi_{t'}$ and restoring prior bit estimates via a memory buffer, GRM reduces per-trial computation while preserving error-correction performance, and it operates compatibly with modern latency-reduction baselines such as SC_LRT and Fast-SSC. The authors provide a statistical analysis of flip-candidate distributions, define the GRM formally with restart paths and partial-sum restoration, and demonstrate substantial average execution-time reductions (roughly $25\%$–$60\%$ for DSCF-3 at $N=1024$, and $15\%$–$22\%$ when applied to Fast-DSCF-3) with modest memory overhead (~$4\%$). The results highlight GRM’s practical impact for hardware implementations, enabling faster, energy-efficient flip-based polar decoders without compromising reliability.

Abstract

Polar codes are a class of linear error-correction codes that have received a lot of attention due to their ability to achieve channel capacity in an arbitrary binary discrete memoryless channel (B-DMC) with low-complexity successive-cancellation (SC) decoding. However, practical implementations often require better error-correction performance than what SC decoding provides, particularly at short to moderate code lengths. Successive-cancellation flip (SCF) decoding algorithm was proposed to improve error-correction performance with an aim to detect and correct the first wrongly estimated bit in a codeword before resuming SC decoding. At each additional SC decoding trial, i.e., decoding attempt beyond the initial unsuccessful trial, one bit estimated as the least reliable is flipped. Dynamic SCF (DSCF) is a variation of SCF, where multiple bits may be flipped simultaneously per trial. Despite the improved error-correction performance compared to the SC decoder, SCF-based decoders have variable execution time, which leads to high average execution time and latency. In this work, we propose the generalized restart mechanism (GRM) that allows to skip decoding computations that are identical between the initial trial and any additional trial. Under DSCF decoding with up to 3-bit flips per decoding trial, our proposed GRM is shown to reduce the average execution time by 25% to 60% without any negative effect on error-correction performance. The proposed mechanism is adaptable to state-of-the-art latency-reduction techniques. When applied to Fast-DSCF-3 decoding, the additional reduction brought by the GRM is 15% to 22%. For the DSCF-3 decoder, the proposed mechanism requires approximately 4% additional memory.

Generalized Restart Mechanism for Successive-Cancellation Flip Decoding of Polar Codes

TL;DR

This work tackles the latency challenge of flip-based polar-code decoders by introducing a Generalized Restart Mechanism (GRM) that skips redundant decoding between trials. By restarting at a targeted location and restoring prior bit estimates via a memory buffer, GRM reduces per-trial computation while preserving error-correction performance, and it operates compatibly with modern latency-reduction baselines such as SC_LRT and Fast-SSC. The authors provide a statistical analysis of flip-candidate distributions, define the GRM formally with restart paths and partial-sum restoration, and demonstrate substantial average execution-time reductions (roughly for DSCF-3 at , and when applied to Fast-DSCF-3) with modest memory overhead (~). The results highlight GRM’s practical impact for hardware implementations, enabling faster, energy-efficient flip-based polar decoders without compromising reliability.

Abstract

Polar codes are a class of linear error-correction codes that have received a lot of attention due to their ability to achieve channel capacity in an arbitrary binary discrete memoryless channel (B-DMC) with low-complexity successive-cancellation (SC) decoding. However, practical implementations often require better error-correction performance than what SC decoding provides, particularly at short to moderate code lengths. Successive-cancellation flip (SCF) decoding algorithm was proposed to improve error-correction performance with an aim to detect and correct the first wrongly estimated bit in a codeword before resuming SC decoding. At each additional SC decoding trial, i.e., decoding attempt beyond the initial unsuccessful trial, one bit estimated as the least reliable is flipped. Dynamic SCF (DSCF) is a variation of SCF, where multiple bits may be flipped simultaneously per trial. Despite the improved error-correction performance compared to the SC decoder, SCF-based decoders have variable execution time, which leads to high average execution time and latency. In this work, we propose the generalized restart mechanism (GRM) that allows to skip decoding computations that are identical between the initial trial and any additional trial. Under DSCF decoding with up to 3-bit flips per decoding trial, our proposed GRM is shown to reduce the average execution time by 25% to 60% without any negative effect on error-correction performance. The proposed mechanism is adaptable to state-of-the-art latency-reduction techniques. When applied to Fast-DSCF-3 decoding, the additional reduction brought by the GRM is 15% to 22%. For the DSCF-3 decoder, the proposed mechanism requires approximately 4% additional memory.

Paper Structure

This paper contains 12 sections, 17 equations, 6 figures, 2 tables.

Figures (6)

  • Figure 1: decoding tree of an $\left(8,4\right)$ polar code with a focus on a node $v$ of length $N_v=4$.
  • Figure 2: Fast- fast_sc and $\text{SC}_{\text{LRT}}$Giard_JETCAS_2017 decoding tree representations of an $(8,\,4)$ polar code.
  • Figure 3: of the information-bit location $a_j\in \bm{\mathcal{A}}$ being the first bit-flipping candidate $i_1= \varepsilon_{t'}\left(0\right)$ under -3 decoding for the code rate $R=1/4$. $\mathbb{P}_{\text{LHS}}$ and $\mathbb{P}_{\text{RHS}}$ are inside each plot.
  • Figure 4: The modified trial $\text{SC}\left(\psi_{t'}, \bm{\varepsilon}_{t'} \right)$ with the bit-flipping index $i_1=9$ and the restart location $\psi_{t'}=11$, in with the for a $\left(16,8\right)$ polar code. The elements in red are computed during the restart path of $\text{SC}\left(\psi_{t'}, \bm{\varepsilon}_{t'} \right)$ .
  • Figure :
  • ...and 1 more figures

Theorems & Definitions (3)

  • Definition 1: The of SCF-based decoder
  • Definition 2: Restart path of $\text{SC}\left(\psi_{t'}, \bm{\varepsilon}_{t'} \right)$
  • Definition 3: Partial-sum restoration