Hardware-Friendly Delayed-Feedback Reservoir for Multivariate Time-Series Classification

TL;DR

This work addresses the challenge of producing a fixed-length intermediate representation for reservoir computing in multivariate time-series classification and the high hardware cost of existing IRs. It introduces DPRR, a dot-product-based reservoir representation, and a fully digital delayed-feedback reservoir (DFR) that uses this representation. FPGA-based evaluations on 12 datasets show that DPRR-based DFR delivers competitive accuracy while significantly reducing hardware resources and power-delay product compared to state-of-the-art neural networks. The results demonstrate a practical, scalable solution for edge-friendly time-series classification with reservoir computing.

Abstract

Reservoir computing (RC) is attracting attention as a machine-learning technique for edge computing. In time-series classification tasks, the number of features obtained using a reservoir depends on the length of the input series. Therefore, the features must be converted to a constant-length intermediate representation (IR), such that they can be processed by an output layer. Existing conversion methods involve computationally expensive matrix inversion that significantly increases the circuit size and requires processing power when implemented in hardware. In this article, we propose a simple but effective IR, namely, dot-product-based reservoir representation (DPRR), for RC based on the dot product of data features. Additionally, we propose a hardware-friendly delayed-feedback reservoir (DFR) consisting of a nonlinear element and delayed feedback loop with DPRR. The proposed DFR successfully classified multivariate time series data that has been considered particularly difficult to implement efficiently in hardware. In contrast to conventional DFR models that require analog circuits, the proposed model can be implemented in a fully digital manner suitable for high-level syntheses. A comparison with existing machine-learning methods via field-programmable gate array implementation using 12 multivariate time-series classification tasks confirmed the superior accuracy and small circuit size of the proposed method.

Figures (6)

• Figure 1: Conceptual diagram of ESN tanaka2019recent. The reservoir in the ESN is a recurrent neural network with fixed weight $W$.
• Figure 2: Conceptual diagram of DFR appeltant2011information. The reservoir in the DFR consists of a nonlinear element (NL) and a feedback loop with a total delay $\tau$. The feedback loop consists of $N_x$ virtual nodes having equal time intervals $\theta$.
• Figure 3: Masking process (univariate input example for clarity). $i$ is the output of digital-to-analog conversion of the original digital input signal $u$. The signal $i$ maintains a constant value for each time duration of $\tau$. The mask signal $m$ changes at time intervals of $\theta$ and has a period of $\tau$. The input to the reservoir is given as $j(t) = i(t) \cdot m(t)$.
• Figure 4: Circuit block diagram and dataflow of the proposed fully digital DFR with DPRR. The operation of "MackeyGlass" is defined in Algorithms \ref{['alg_f']} and \ref{['alg_MG']}.
• Figure 5: Comparison of memory usage. Each method is plotted using BRAM counts on the horizontal axis and the average rank calculated in Section \ref{['subsec:comp2']} on the vertical axis