Timing Analysis Agent: Autonomous Multi-Corner Multi-Mode (MCMM) Timing Debugging with Timing Debug Relation Graph

TL;DR

The paper tackles the challenge of debugging MCMM timing reports in modern VLSI by introducing the Timing Analysis Agent, a hierarchical, multi-LLM framework augmented with a Timing Debug Relation Graph (TDRG). It integrates an Expert Report Agent that generates executable queries, a TDRG Traversal Agent for cross-report planning, and an MCMM Planner Agent to decompose tasks by corner and mode. The approach achieves 98% pass-rate on single-report benchmarks and 90% on multi-report benchmarks, outperforming baseline retrieval methods by over 46% and a naive planner without TDRG. A sensitivity analysis confirms that richer node/edge descriptions in the TDRG substantially improve multi-report performance. This work promises significant reductions in debugging turnaround and scalability for complex MCMM timing analyses in industry settings.

Abstract

Timing analysis is an essential and demanding verification method for Very Large Scale Integrated (VLSI) circuit design and optimization. In addition, it also serves as the cornerstone of the final sign-off, determining whether the chip is ready to be sent to the semiconductor foundry for fabrication. Recently, as the technology advance relentlessly, smaller metal pitches and the increasing number of devices have led to greater challenges and longer turn-around-time for experienced human designers to debug timing issues from the Multi-Corner Multi-Mode (MCMM) timing reports. As a result, an efficient and intelligent methodology is highly necessary and essential for debugging timing issues and reduce the turnaround times. Recently, Large Language Models (LLMs) have shown great promise across various tasks in language understanding and interactive decision-making, incorporating reasoning and actions. In this work, we propose a timing analysis agent, that is empowered by multi-LLMs task solving, and incorporates a novel hierarchical planning and solving flow to automate the analysis of timing reports from commercial tool. In addition, we build a Timing Debug Relation Graph (TDRG) that connects the reports with the relationships of debug traces from experienced timing engineers. The timing analysis agent employs the novel Agentic Retrieval Augmented Generation (RAG) approach, that includes agent and coding to retrieve data accurately, on the developed TDRG. In our studies, the proposed timing analysis agent achieves an average 98% pass-rate on a single-report benchmark and a 90% pass-rate for multi-report benchmark from industrial designs, demonstrating its effectiveness and adaptability.

Figures (7)

• Figure 1: An illustration of Timing Analysis Agent, which integrates hierarchical planning, multi-agent collaborations, and the novel distilled Timing Debug Relation Graph to solve MCMM timing task.
• Figure 2: Hierarchical relations of the MCMM timing reports. There are multiple PVT corners and modes, like TT_mode1, SS_mode3, etc. Each of corner and mode has max, min, xtalk_max, xtalk_min, clk, freq, LC, and wire reports.
• Figure 3: Examples of max and xtalk_max timing report for a specific corner and mode.
• Figure 4: (a) Flow overview of Timing Analysis Agent with hierarchical plan solving, and multi-agent collaboration. (b) Timing Debug Relation Graph (TDRG) from distilled debug traces from experienced timing engineer. (c) Structural report database for coding agentic retrieval.
• Figure 5: An example of Expert Report Agent writing Python code to retrieve path ID of the minimum slack in max report.