A Multi-Stage Potts Machine based on Coupled CMOS Ring Oscillators
Yilmaz Ege Gonul, Baris Taskin
TL;DR
To address NP-hard COPs challenging for von Neumann hardware, the paper proposes a multi-stage Potts machine based on coupled CMOS ring oscillators (MSROPM) that encodes multivalued spins via phase-shifted SHIL. The architecture enables compute-in-memory operation and staged solution refinement, avoiding external mappings or memory. It demonstrates planar 4-coloring up to 2116 nodes with up to 97% accuracy and 60 ns solution times at 1 V in 65 nm CMOS, illustrating strong scalability and energy efficiency relative to prior ROSC-based approaches. The approach generalizes to higher color counts and offers practical implications for scalable hardware accelerators of COPs.
Abstract
This work presents a multi-stage coupled ring oscillator based Potts machine, designed with phase-shifted Sub Harmonic-Injection-Locking (SHIL) to represent multi valued Potts spins at different solution stages with os cillator phases. The proposed Potts machine is able to solve a certain class of combinatorial optimization prob lems that natively require multivalued spins with a divide and-conquer approach, facilitated through the alternating phase-shifted SHILs acting on the oscillators. The pro posed architecture eliminates the need for any external in termediary mappings or usage of external memory, as the influence of SHIL allows oscillators to act as both mem ory and computation units. Planar 4-coloring problems of sizes up to 2116 nodes are mapped to the proposed architecture. Simulations demonstrate that the proposed Potts machine provides exact solutions for smaller prob lems (e.g. 49 nodes) and generates solutions reaching up to 97% accuracy for larger problems (e.g. 2116 nodes).
