Lattice Surgery Compilation Beyond the Surface Code

TL;DR

This work broadens fault-tolerant quantum compilation beyond the surface code by introducing a general lattice-surgery compilation formalism applicable to topological codes. It separates the problem into microscopic substrates and a macroscopic routing graph, then demonstrates two substrates (color code and folded surface code) and develops macroscopic routing and qubit-mapping strategies, including distance-preserving snakes. Through numerical studies on color-code substrates, it shows how logical qubit placement, T-gate availability, and circuit parallelism influence compiled depth, and it provides open-source tooling to support further exploration. Overall, it lays foundational methods for practical fault-tolerant compilation in lattice-surgery architectures beyond the surface code.

Abstract

Large-scale fault-tolerant quantum computation requires compiling logical circuits into physical operations tailored to a given architecture. Prior work addressing this challenge has mostly focused on the surface code and lattice surgery schemes. In this work, we broaden the scope by considering lattice surgery compilation for topological codes beyond the surface code. We begin by defining a code substrate - a blueprint for implementing topological codes and lattice surgery. We then abstract from the microscopic details and rephrase the compilation task as a mapping and routing problem on a macroscopic routing graph, potentially subject to substrate-specific constraints. We explore specific substrates and codes, including the color code and the folded surface code, providing detailed microscopic constructions. For the color code, we present numerical simulations analyzing how design choices at the microscopic and macroscopic levels affect the depth of compiled logical $\mathrm{CNOT}+\mathrm{T}$ circuits. An open-source code is available on GitHub https://github.com/cda-tum/mqt-qecc.

Figures (11)

• Figure 1: Lattice surgery compilation overview. (a) Geometrically local physical qubit connectivity for physical data (black circles) and ancilla (white circles) qubits. (b) Substrate $\mathcal{S}$ (grey) for the color code, together with patches forming logical ancilla and data qubits (magic state patches not displayed in this cutout). This is referred to as the microscopic level. (c) Zooming out yields the macroscopic level with the routing graph $\mathcal{R}$ (orange) and specific allocation of logical data patches, represented by light blue nodes with integer labels. Magic state patches are displayed as pink nodes $f_i$. Furthermore, the colored paths represent a possible routing for the exemplary input circuit in (d), where parallel executable gates are displayed in the same color.
• Figure 2: (a) $d=5$ color code on a hexagonal tiling with data qubits on the vertices. Each face defines both a $X$ and $Z$ stabilizer on the incident qubits. Both $X_L$ and $Z_L$ logical operators are supported on the boundaries of the triangular region. (b) $d=5$ surface code, where $Z$ stabilizers are pink faces and $X$ stabilizers are blue faces. The dotted line encloses a region supporting the rotated surface code, where faces only partly contained in the boundary correspond to weight 2 stabilizers. (c) Folded surface code obtained by folding along the orange qubits on the diagonal. This procedure stacks $X$ faces on $Z$ faces and vice versa.
• Figure 3: (a) Measurement-based representation of the $\mathrm{CNOT}{}$ gate. $a,b,c$ are the measurement outcomes of $M_{XX}, M_{ZZ}, M_{X}$, respectively. (b) Injection of a logical magic state on a logical qubit with a $\mathrm{CNOT}{}$ gate.
• Figure 4: Code substrate $\mathcal{S}$ (depicted in grey) for (a) the color code and (b) the surface code. The logical patches from $\mathcal{L}, \mathcal{A}, \mathcal{F}$ are bounded by thick black lines. Unlike the ancilla patches, the data patches on the surface code substrate are folded, which is not explicitly displayed. The resulting routing graph $\mathcal{R}$ is the orange hexagonal graph, which is the same for both substrates. Both depicted substrates have $d=5$ logical patches.
• Figure 5: Considered layouts, i.e., a choice of $\mathcal{L}$ and $\mathcal{A}$ that determines the routing graph $\mathcal{R}$, and their asymptotic packing ratio $c$, which we define as the number of logical data qubit patches (assuming that the folded surface code forms one patch) to the total number of patches. Light blue and gray nodes depict logical data qubits and ancilla patches, respectively.

Theorems & Definitions (2)

• Example 1
• Example 2