High-Resolution Casimir Force Sensing Across a Superconducting Transition

Abstract

The Casimir effect and superconductivity are foundational quantum phenomena whose interplay is an open question in physics, with significant implications for electron physics, quantum gravity, and high-temperature superconductivity. Determining how Casimir forces behave across a superconducting transition remains elusive due to the difficulty of realizing precise alignment, cryogenic operation, and isolating small force changes from competing effects. Recent theories predict milli-Pascal jumps in Casimir pressure across the transition, motivating experiments capable of reaching well below this regime. Here, we demonstrate an on-chip superconducting nanomechanical platform that overcomes these long-standing challenges, achieving the most parallel Casimir configurations to date. Our microchip-based parallel plates reach unprecedented area-to-separation ratios, exceeding past experiments across superconducting transitions by three orders of magnitude and yielding the strongest Casimir forces generated between compliant surfaces. Scanning tunneling microscopy (STM) directly detects the resonant motion of a suspended nanoscale plate with subatomic precision in lateral positioning and displacement, enabling suppression of van der Waals, electrostatic, and thermal effects. With verified micro-Pascal pressure resolution, our platform provides a credible entry point into a new field of quantum experiments, enabling exploration of Casimir-superconductivity interactions with the stability, parallelism, and sensitivity required to access this regime of physics.

Figures (29)

• Figure 1: Superconducting Casimir Force (a) Schematic of a superconducting Casimir cavity with two plates of area $A$ separated by gap $d$. Inset: plates' superconducting transition. (b) Challenges in measuring Casimir shifts across $T_C$ include achieving high parallelism with compliant plates, minimally invasive readout, and isolating Casimir forces from electrostatic and measurement artifacts. (c) Plate design requirements are high compliance, high-$Q$ resonance, and high $T_C$ for sensitive measurements across $T_C$.
• Figure 2: Achieving extreme parallelism on-chip. (a) Colorized SEM of a microchip with suspended NbTiN (square) membranes above a NbTiN backgate; inset shows the layered structure. Membranes feature micron-scale holes for selective plasma etching of the a-Si layer. A $1~\mu \rm m$ SiO$_2$ layer electrically isolates the Casimir cavity. (b) A central hole in the top membrane offers visual access to the gap. (c) Close-up of 190 nm gaps sustained over millimeter-scale areas, with $\sim$153 pm sag kept taut by high-stress NbTiN. (d) Comparison of area-over-gap ratios for published Casimir setups. Here, the ideal Casimir force between perfect conductors is used as a consistent metric to quantify effective parallelism. Blue squares: plate-plate ($F \propto A/d^4$); red circles: sphere-plate ($F \propto R/d^3$). Our chip platform's parallelism surpasses prior cryogenic and room-temperature experiments, achieving the highest Casimir force between compliant surfaces to date. See Supplementary Information J for data sources.
• Figure 3: STM readout of membrane motion (a) Schematic of the STM-based measurement setup, showing AC and DC signals applied to the backgate to drive the NbTiN membrane and detect resonance via tunneling with the STM tip. (b) Photo of the sample holder with wire-bonded chips featuring small (190 nm) and big (1213 nm) gaps for comparison. (c) In-situ optical image from the STM, highlighting the precise placement of the tip near the edge of the suspended membrane. (d) Protocol for detecting resonance frequency shifts induced by Casimir forces across $T_C$, comparing small-gap and big-gap configurations.
• Figure 4: STM-based Casimir measurement and cancellation of non-Casimir forces. (a) Schematic of thermo-elastic, electrostatic, and van der Waals interactions to be removed. (b) STM scan showing tip scanning within a $3\times 3$ nm$^2$ area at a topographic maximum with 10 pm localization. (c–e) Sequential cancellation of plate–plate electrostatics, tip–sample electrostatics, and van der Waals forces. (f) Large- and small-gap devices share $T_C \approx 14.2$ K; total resistance including non-superconducting leads (g) Small-gap device shows sharper frequency changes near $T_C$. (h) Background-subtracted Casimir pressure gradient agrees in magnitude and sign with plasma–BCS theory (See Methods).
• Figure 5: Fabrication of the on-chip superconducting Casimir cavity. (a) Key steps for patterning and releasing a freestanding NbTiN membrane. (b) Photograph of a 10$\times$10 mm$^2$ chip containing multiple cavities, with schematic zooms to scale showing the achieved parallelism: a 700 $\mu$m span separated by a 190 nm gap, with an analytically estimated central deflection of only $\sim$153 pm due to Casimir forces.