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Minimal thermodynamic cost of computing with circuits

Abhishek Yadav, Mahran Yousef, David Wolpert

TL;DR

This paper uses the mismatch cost of a given circuit that is run multiple times in a row to calculate a lower bound on the entropy production incurred in each such run, and discusses conditions under which MMC of a circuit is proportional to the size of a circuit, and when they are not.

Abstract

All digital devices have components that implement Boolean functions, mapping that component's input to its output. However, any fixed Boolean function can be implemented by an infinite number of circuits, all of which vary in their resource costs. This has given rise to the field of circuit complexity theory, which studies the minimal resource cost to implement a given Boolean function with any circuit. Traditionally, circuit complexity theory has focused on the resource costs of a circuit's size (its number of gates) and depth (the longest path length from the circuit's input to its output). In this paper, we extend circuit complexity theory by investigating the minimal thermodynamic cost of a circuit's operation. We do this by using the mismatch cost (MMC) of a given circuit that is run multiple times in a row to calculate a lower bound on the entropy production (EP) incurred in each such run. Specifically, we discuss conditions under which MMC of a circuit is proportional to the size of a circuit, and when they are not. We also use our results to compare the thermodynamic costs of different circuit families implementing the same family of Boolean functions. In addition, we analyze how differences in the underlying physics of individual gates within a circuit influence the minimal thermodynamic cost of the circuit as a whole. These results lay the foundation for extending circuit complexity theory to include mismatch cost as a resource cost.

Minimal thermodynamic cost of computing with circuits

TL;DR

This paper uses the mismatch cost of a given circuit that is run multiple times in a row to calculate a lower bound on the entropy production incurred in each such run, and discusses conditions under which MMC of a circuit is proportional to the size of a circuit, and when they are not.

Abstract

All digital devices have components that implement Boolean functions, mapping that component's input to its output. However, any fixed Boolean function can be implemented by an infinite number of circuits, all of which vary in their resource costs. This has given rise to the field of circuit complexity theory, which studies the minimal resource cost to implement a given Boolean function with any circuit. Traditionally, circuit complexity theory has focused on the resource costs of a circuit's size (its number of gates) and depth (the longest path length from the circuit's input to its output). In this paper, we extend circuit complexity theory by investigating the minimal thermodynamic cost of a circuit's operation. We do this by using the mismatch cost (MMC) of a given circuit that is run multiple times in a row to calculate a lower bound on the entropy production (EP) incurred in each such run. Specifically, we discuss conditions under which MMC of a circuit is proportional to the size of a circuit, and when they are not. We also use our results to compare the thermodynamic costs of different circuit families implementing the same family of Boolean functions. In addition, we analyze how differences in the underlying physics of individual gates within a circuit influence the minimal thermodynamic cost of the circuit as a whole. These results lay the foundation for extending circuit complexity theory to include mismatch cost as a resource cost.

Paper Structure

This paper contains 29 sections, 3 theorems, 101 equations, 13 figures, 1 table.

Key Result

Theorem 1

Suppose that: Then the total mismatch cost of running the circuit $C_n$, in the worst case over input distributions, satisfies the upper bound independently of the fan-in and fan-out of the gates, where are positive constants determined by the minimal components of the gate and input node priors, respectively.

Figures (13)

  • Figure 1: An example of a 2-input and 1-output circuit with a topological ordering.
  • Figure 2: State space dynamics of a circuit computation. (A) The circuit begins in a state inherited from the previous run, with all gate values logically dependent according to the circuit structure. (B) The inputs are updated for the new run, resetting their values independently of the rest of the circuit. (C–G) Gates are sequentially updated based on their input dependencies, progressively building logical correlations as computation unfolds.
  • Figure 3: Evolution of joint distribution under re-initialization of inputs and re-running the circuit gate-by-gate. (A) After a complete run, the joint distribution reflects maximal correlation among all gates. This correlation arises from the initial input distribution and the network of dependencies within the circuit. (B) In the next run, the input nodes are re-sampled from the input distribution $p(\boldsymbol{x}_{\mathrm{in}})$, making the new inputs independent of the states of non-input gates from the previous run. As a result, the joint distribution after re-initialization is factored as $p(\boldsymbol{x}_{\mathrm{in}})p(x_1, ..., x_5)$, indicating that inputs and non-input gates are now statistically independent. (C) When gate $x_1$ updates based on the newly re-sampled input values, it becomes correlated with the input nodes while simultaneously losing correlation with the rest of the gates. Consequently, the joint distribution evolves to $p(\boldsymbol{x}_{\mathrm{in}}, x_1)p(x_2,...,x_5)$. Similarly, (D), (E), (F), and (G) illustrate the sequential updates of the remaining gates and the corresponding evolution of the distribution. In particular, (G) demonstrates that after a complete run of the circuit, the distribution returns to its initial form as shown in (A).
  • Figure 4: Layer-by-layer implementation of a circuit. (A) State of the circuit after a complete run. (B) Updating of input nodes for the next run, with values re-sampled from $p(\boldsymbol{x}_{\mathrm{in}})$. (C) The first layer consists of gates $x_1$ and $x_2$. As they update together based on the newly sampled input values, they become correlated with the input nodes while losing correlation with the rest of the gates. Consequently, the joint distribution evolves to $p(\boldsymbol{x}_{\mathrm{in}}, x_1, x_2)p(x_3, x_4, x_5)$. (D) Gates $x_3$ and $x_4$ make up layer 2. As they update based on the new values of gates $x_1$ and $x_2$, they become correlated with them and the input nodes, while becoming independent of the state of $x_5$. The distribution then evolves to $p(\boldsymbol{x}_{\mathrm{in}}, x_1, ..., x_4)p(x_5)$. Finally, in (E), gate $x_5$, constituting layer 3, is updated, and the distribution returns to its initial form as shown in (A).
  • Figure 5: Comparison of layer-by-layer and gate-by-gate mismatch costs for the ripple-carry adder circuit family. Notably, the layer-by-layer mismatch cost remains consistently lower than the gate-by-gate mismatch cost. In this comparison, the input distribution is uniformly random for both implementations, and the priors of all gates in the circuits are also uniform.
  • ...and 8 more figures

Theorems & Definitions (7)

  • Definition 1: Size and depth complexity
  • Definition 2: Circuit complexity class
  • Definition 3: Mismatch Cost Complexity
  • Definition 4: Mismatch cost complexity class
  • Theorem 1
  • Corollary 1.1
  • Theorem 2