PHOENIX: Pauli-Based High-Level Optimization Engine for Instruction Execution on NISQ Devices

TL;DR

PHOENIX introduces a Pauli-based high-level optimization engine that operates on binary symplectic BSF representations of Pauli strings to perform global Clifford-based simplifications on groups of IRs, followed by a Tetris-like ordering to minimize circuit depth and routing overhead. The framework is ISA-agnostic and routing-aware, achieving substantial reductions in 2-qubit gate count and circuit depth across diverse Hamiltonian-simulation VQA programs (UCCSD, QAOA) and hardware topologies, including SU(4) ISAs. Empirical results show PHOENIX outperforming state-of-the-art compilers (TKet, Paulihedral, Tetris) in most settings, with notable improvements in algorithmic accuracy and robustness to hardware mapping. These findings suggest a shift toward high-level IRs for scalable, hardware-aware quantum compilation on NISQ devices and potential implications for future processor design.

Abstract

Variational quantum algorithms (VQA) based on Hamiltonian simulation represent a specialized class of quantum programs well-suited for near-term quantum computing applications due to its modest resource requirements in terms of qubits and circuit depth. Unlike the conventional single-qubit (1Q) and two-qubit (2Q) gate sequence representation, Hamiltonian simulation programs are essentially composed of disciplined subroutines known as Pauli exponentiations (Pauli strings with coefficients) that are variably arranged. To capitalize on these distinct program features, this study introduces PHOENIX, a highly effective compilation framework that primarily operates at the high-level Pauli-based intermediate representation (IR) for generic Hamiltonian simulation programs. PHOENIX exploits global program optimization opportunities to the greatest extent, compared to existing SOTA methods despite some of them also utilizing similar IRs. Experimental results demonstrate that PHOENIX outperforms SOTA VQA compilers across diverse program categories, backend ISAs, and hardware topologies.

Figures (8)

• Figure 1: Conventional Pauli exponentiation synthesis v.s. Simultaneous simplification by Clifford conjugation. (a) Pauli exponentiations are synthesized by gate set $\{ H, S, S^\dagger, Z(\theta), \mathrm{CNOT} \}$, through variable $\mathrm{CNOT}$-tree unrolling schemes. (b) Multiple 3Q Pauli exponentiations can be simultaneously simplified into 2Q Pauli exponentiations, through a 2Q Clifford conjugation, where $C = (H\otimes S)\, \mathrm{CNOT}\, (H\otimes S^\dagger)$ in this example. (c) The simplified Pauli exponentiations can be rebased to versatile quantum gate sets, such as $\mathrm{CNOT}$-based and $\mathrm{B}$-based ISAs, with significantly reduced 2Q gate count.
• Figure 2: Examples of Clifford transformations on BSF. Columns $a$ and $b$, corresponding to qubit $a$ and $b$, for $X$ and $Z$ blocks are indicated by $x_a$, $x_b$, $z_a$, $z_b$, respectively. (a) $H$ gate acting on qubit $a$ will exchanges $x_a$ and $z_a$. (b) $S$ gate acting on qubit $a$ results in $z_a \gets z_a \oplus x_a$. (c) $C(Z,X)_{a,b}$, i.e., the $\mathrm{CNOT}$ gate, results in $x_b \gets x_b \oplus x_a$ and $z_a \gets z_a \oplus z_b$. (d) $C(X,X)$ transformation is equivalent with successively applying $H$ on $a$, $C(Z,X)_{a,b}$, and $H$ on $a$, resulting in $x_a \gets x_a \oplus z_b$ and $x_b \gets x_b \oplus z_a$.
• Figure 3: Tetris-like circuits assembling. (a) $e_l$ and $e_r$ examples. (b) Scenario I: $\mathrm{cost}_\mathrm{depth} = \textsc{sum}(e_r + e_l')$; Scenario II: $\mathrm{cost}_\mathrm{depth} = \textsc{sum}(e_r + e_l' - 1)$.
• Figure 4: Gate cancellation opportunities and routing-aware assembling. (a) Clifford2Q cancellation between the preceding and succeeding subcircuits may or may not induce circuit depth decrease. (b) The subcircuit (upper right) whose qubit interaction graph is more similar to that of the already assembled subcircuit (left) is preferred over the other (lower right).
• Figure 5: Logical-level compilation (all-to-all topology).