A Scalable and Robust Compilation Framework for Emitter-Photonic Graph State

TL;DR

The work tackles scalable generation of emitter-based graph states in a deterministic setting by introducing a divide-and-conquer GraphState-to-Circuit compiler. It partitions target graphs into subgraphs, applies local complementation, and schedules subcircuits to maximize emitter reuse while minimizing inter-subgraph entanglements and photon loss. The approach combines time-reversed graph reduction with a hardware-aware objective to reduce emitter–emitter CNOTs, circuit depth, and loss, showing significant gains over state-of-the-art methods across lattice, tree, and random graphs. The results imply practical scalability for large graph states on emitter-based platforms such as silicon quantum dots, NV centers, and Rydberg systems, enhancing feasibility for MBQC and distributed quantum computing.

Abstract

Quantum graph states are critical resources for various quantum algorithms, and also determine essential interconnections in distributed quantum computing. There are two schemes for generating graph states probabilistic scheme and deterministic scheme. While the all-photonic probabilistic scheme has garnered significant attention, the emitter-photonic deterministic scheme has been proved to be more scalable and feasible across several hardware platforms. This paper studies the GraphState-to-Circuit compilation problem in the context of the deterministic scheme. Previous research has primarily focused on optimizing individual circuit parameters, often neglecting the characteristics of quantum hardware, which results in impractical implementations. Additionally, existing algorithms lack scalability for larger graph sizes. To bridge these gaps, we propose a novel compilation framework that partitions the target graph state into subgraphs, compiles them individually, and subsequently combines and schedules the circuits to maximize emitter resource utilization. Furthermore, we incorporate local complementation to transform graph states and minimize entanglement overhead. Evaluation of our framework on various graph types demonstrates significant reductions in CNOT gates and circuit duration, up to 52% and 56%. Moreover, it enhances the suppression of photon loss, achieving improvements of up to x1.9.

Figures (11)

• Figure 1: The background on GraphState-to-Circuit Compilation. a) The constraints of a deterministic graph state generation, with $p$ as photon and $e$ as emitter. For deterministic purpose, only emitter-emitter CNOT in green and emitter-photon CNOTs (emissions) in blue are allowed. b) Generation of a graph state on photon qubits $p_0$ - $p_3$. c) The circuit for generating the graph state in b), as a result of compilation. d) An optimized circuit for the same graph state, with fewer emitters utilization and fewer CNOTs engaged compared to c).
• Figure 2: Operations of the time reversed graph reduction model.
• Figure 3: An example of the time-reversed reduction sequence (black arrows), corresponding to the circuit in Figure \ref{['fig:circmodel']}.c (red arrows).
• Figure 4: Leveraging local complementation to optimize the graph state. In this example, a Clifford unitary is applied on photon 1 ($U_1^{LC}$), leading to a local complementation of the corresponding vertex 1, acting on neighborhood vertices 0, 2, 3.
• Figure 5: The emitter usage number over time (timescale simplified), for a graph state generation circuit.