Protected phase gate for the $0$-$π$ qubit using its internal modes
Xanda C Kolesnikow, Thomas B Smith, Felix Thomsen, Abhijeet Alase, Andrew C Doherty
TL;DR
This work tackles the challenge of performing gates on protected superconducting qubits without compromising their protection. It introduces a protected phase gate for the $0$-$\pi$ qubit that uses the circuit's internal $\zeta$ mode as an ancilla and a tunable Josephson element to mediate a qubit-ancilla interaction, avoiding reliance on external high-impedance oscillators. Through numerical simulations and effective-model reductions, the authors show that protected operation is achievable with near-term circuit parameters, with gate robustness improving with ancilla impedance and the qubit's charging-energy ratio, while remaining tolerant to circuit disorder. They also discuss hardware constraints, cooling strategies, and extensions to protected two-qubit and non-Clifford gates, highlighting the potential to reduce hardware overhead for protected quantum computation and to broaden gate sets on protected qubits.
Abstract
Protected superconducting qubits such as the $0$-$π$ qubit promise to substantially reduce physical error rates. However, a key challenge in the field is designing gates for these qubits that do not compromise their protection, or become infeasibly slow as the protection of the qubit is improved. In this work we propose a protected phase gate that is compatible with the protected regime of the $0$-$π$ qubit, and does not suffer from spurious coupling to additional circuit modes. Our gate utilises an internal mode of the circuit as an ancilla, and is achieved by varying the qubit-ancilla coupling via a tunable Josephson element. Through numerical simulations, we study how the gate error scales with the circuit parameters of the $0$-$π$ qubit and the tunable Josephson element that enacts the gate. Ultimately, we find that a protected gate with the $0$-$π$ qubit is possible with near-term circuit parameters. Our work opens up the possibility of performing protected gates on protected superconducting qubits, which may significantly reduce hardware overheads for quantum computation.
