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Protected phase gate for the $0$-$π$ qubit using its internal modes

Xanda C Kolesnikow, Thomas B Smith, Felix Thomsen, Abhijeet Alase, Andrew C Doherty

TL;DR

This work tackles the challenge of performing gates on protected superconducting qubits without compromising their protection. It introduces a protected phase gate for the $0$-$\pi$ qubit that uses the circuit's internal $\zeta$ mode as an ancilla and a tunable Josephson element to mediate a qubit-ancilla interaction, avoiding reliance on external high-impedance oscillators. Through numerical simulations and effective-model reductions, the authors show that protected operation is achievable with near-term circuit parameters, with gate robustness improving with ancilla impedance and the qubit's charging-energy ratio, while remaining tolerant to circuit disorder. They also discuss hardware constraints, cooling strategies, and extensions to protected two-qubit and non-Clifford gates, highlighting the potential to reduce hardware overhead for protected quantum computation and to broaden gate sets on protected qubits.

Abstract

Protected superconducting qubits such as the $0$-$π$ qubit promise to substantially reduce physical error rates. However, a key challenge in the field is designing gates for these qubits that do not compromise their protection, or become infeasibly slow as the protection of the qubit is improved. In this work we propose a protected phase gate that is compatible with the protected regime of the $0$-$π$ qubit, and does not suffer from spurious coupling to additional circuit modes. Our gate utilises an internal mode of the circuit as an ancilla, and is achieved by varying the qubit-ancilla coupling via a tunable Josephson element. Through numerical simulations, we study how the gate error scales with the circuit parameters of the $0$-$π$ qubit and the tunable Josephson element that enacts the gate. Ultimately, we find that a protected gate with the $0$-$π$ qubit is possible with near-term circuit parameters. Our work opens up the possibility of performing protected gates on protected superconducting qubits, which may significantly reduce hardware overheads for quantum computation.

Protected phase gate for the $0$-$π$ qubit using its internal modes

TL;DR

This work tackles the challenge of performing gates on protected superconducting qubits without compromising their protection. It introduces a protected phase gate for the - qubit that uses the circuit's internal mode as an ancilla and a tunable Josephson element to mediate a qubit-ancilla interaction, avoiding reliance on external high-impedance oscillators. Through numerical simulations and effective-model reductions, the authors show that protected operation is achievable with near-term circuit parameters, with gate robustness improving with ancilla impedance and the qubit's charging-energy ratio, while remaining tolerant to circuit disorder. They also discuss hardware constraints, cooling strategies, and extensions to protected two-qubit and non-Clifford gates, highlighting the potential to reduce hardware overhead for protected quantum computation and to broaden gate sets on protected qubits.

Abstract

Protected superconducting qubits such as the - qubit promise to substantially reduce physical error rates. However, a key challenge in the field is designing gates for these qubits that do not compromise their protection, or become infeasibly slow as the protection of the qubit is improved. In this work we propose a protected phase gate that is compatible with the protected regime of the - qubit, and does not suffer from spurious coupling to additional circuit modes. Our gate utilises an internal mode of the circuit as an ancilla, and is achieved by varying the qubit-ancilla coupling via a tunable Josephson element. Through numerical simulations, we study how the gate error scales with the circuit parameters of the - qubit and the tunable Josephson element that enacts the gate. Ultimately, we find that a protected gate with the - qubit is possible with near-term circuit parameters. Our work opens up the possibility of performing protected gates on protected superconducting qubits, which may significantly reduce hardware overheads for quantum computation.

Paper Structure

This paper contains 59 sections, 170 equations, 18 figures.

Figures (18)

  • Figure 1: Protected gates for the $0$-$\pi$ qubit. (a) Circuit diagram for the $0$-$\pi$ qubit; two capacitors, two inductors, and two Josephson junctions are connected in the geometry shown. The circuit has four quadrupole circuit modes; the $\theta$ and $\varphi$ modes encode the qubit, the $\zeta$ mode is harmonic, and $\Sigma$ is nondynamical. Red/blue nodes represent positive/negative contributions to each mode. (b) Implementation of a protected phase gate using an external oscillator Kitaev2006Brooks2013. A tunable Josephson element (green) couples the $0$-$\pi$ qubit to an oscillator mode $\phi$ (purple). (c) Our scheme for a protected phase gate, which utilises the internal harmonic mode $\zeta$ (purple) instead of an external oscillator.
  • Figure 2: Protected phase gate for a protected qubit. (a) Circuit diagram for a protected qubit mode $\theta$ (red) coupled to a harmonic oscillator mode $\phi$ (purple) via a tunable Josephson element (green). (b) Approximate eigenstates of the protected qubit GKP logical operator $\bar{Z}_\theta$. Blue and orange wavefunctions correspond to $\langle \bar{Z}_\theta \rangle \approx \pm 1$, respectively, and the potential energy for the qubit is shown in grey. (c) Qubit-state-dependent oscillator wavefunctions at various points in the gate sequence. (d) Pulse schedule for the tunable Josephson coupling (green); characterised by a wait-time $\tau$ and a ramp-time $\tau_J$. Also shown, is the relative logical phase (grey) acquired by the states $\ket{0}$ and $\ket{1}$ throughout the gate sequence. (e) GKP stabiliser generator expectation values of the oscillator throughout the gate sequence.
  • Figure 3: Performance of a protected phase gate for an ideal qubit. (a) Gate error $\varepsilon_\diamond$ (measured by the diamond norm deviation) as a function of deviations in the pulse wait-time $\delta \tau$, where $\delta \tau$ is given by \ref{['eqn:delta-tau']}, calculated for different values of the oscillator impedance $Z_\phi$. Protected gates are marked in solid lines whereas the dashed line denotes an unprotected gate. Inset: identical data on a log-linear plot. Dotted lines correspond to threshold gate errors $\varepsilon_\diamond^*$ for (c). (b) Gate imprecision (measured by the minimum gate error $\min \varepsilon_\diamond$) as a function of $Z_\phi$. (c) Gate robustness (measured by the maximum range of $\delta \tau$ to remain below a threshold error rate $\varepsilon_\diamond^*$) as a function of $Z_\phi$. (d) Imprecision, and (e) robustness as a function of the maximum Josephson coupling $E_{J_\mathrm{max}}$. (f) Imprecision, and (g) robustness as a function of the minimum Josephson coupling $E_{J_\mathrm{min}}$. For these simulations, $E_{C_\phi}/E_C = 100$, $E_J/E_{C_\phi} = 1$, and in panels (a) -- (c), $E_{J _\mathrm{min}} = 0$ and $E_{J _\mathrm{max}} / E_{C_\phi} = 100$.
  • Figure 4: Effective one-dimensional model for the $0$-$\pi$ qubit. (a) Wavefunctions for the $0$-$\pi$ qubit logical states. (b) Two-dimensional potential of the $0$-$\pi$ qubit, with the effective one-dimensional model (yellow) constructed from the local minima. The nearest-neighbour and next-nearest-neighbour tunnelling rates (red) are $E_{J_\alpha}$ and $E_{J_{2\alpha}}$, respectively. (c) Ratio of the tunnelling rates $E_{J_\alpha}/E_{J_{2\alpha}}$ as a function of the $0$-$\pi$ qubit charging energy ratio $E_{C_\varphi}/E_{C_\theta}$. (d) Ratio of the tunnelling rates as a function of the $\zeta$-mode impedance $Z_\zeta$, with $E_J/E_{C_\varphi}$ given by the value that maximises the protection of the $0$-$\pi$ qubit at each impedance. Throughout all results, $E_{C_\varphi}/E_{C_\theta} = 100$, and in panels (a) -- (c), $E_J/E_{C_\varphi} = 5$ and $Z_\zeta / R_Q = 10$.
  • Figure 5: Comparison of two different implementations of a protected phase gate for the $0$-$\pi$ qubit. (a) Imprecision and (b) robustness of a gate that uses an external oscillator $\phi$ as a function of the $\zeta$-mode impedance $Z_\zeta$ of the $0$-$\pi$ qubit. We have set $Z_\phi / R_Q = 10$. (c) Imprecision and (d) robustness of a gate that uses the $\zeta$ mode of the $0$-$\pi$ qubit, instead of an external oscillator. For each data point, a different value of $E_{J _\mathrm{max}}$ is chosen, denoted $E^*_{J _\mathrm{max}}$. This is defined to be the minimal value of $E_{J _\mathrm{max}}$ for which $\Delta_\tau (0.001)>0$, if it exists, or the value that maximises the precision, otherwise. Its units are in $E_{C_\phi}$ for the left column and $E_{C_\zeta}$ for the right column. Throughout all simulations, $E_{C_\varphi}/E_{C_\theta} = 100$ and $E_{J _\mathrm{min}} = 0$. The circuit diagrams corresponding to each implementation of the gate are shown as insets in the top panels of each column.
  • ...and 13 more figures