Scalable and fault-tolerant preparation of encoded k-uniform states

TL;DR

This work addresses the challenge of scalable, fault-tolerant preparation and verification of $k$-uniform states by deriving a stabilizer-tableau-based method to determine $k$-uniformity and by designing a structured class of fault-tolerant Clifford circuits that are scalable across large $N$. It demonstrates explicit, exact $k$-uniform circuits for the rotated surface code and the [4,2,2] color code (for $k\le 4$), with bulk-focused architectures that minimize boundary adjustments. A novel hybrid physical–logical scheme is introduced, enabling selective unencoding and physical rotations to reduce resource overhead while preserving error protection, and numerical simulations show this approach can outperform purely physical state preparation, especially as circuit depth and $k$ grow. The results offer a practical pathway to high-fidelity encoded $k$-uniform resource states for teleportation, error correction, and quantum simulations on near-term hardware, with clear directions for extending to $ ablaDelta$-approximate variants and end-to-end logical protocols.

Abstract

$k$-uniform states are valuable resources in quantum information, enabling tasks such as teleportation, error correction, and accelerated quantum simulations. The practical realization of $k$-uniform states, at scale, faces major obstacles: verifying $k$-uniformity is as difficult as measuring code distances, and devising fault-tolerant preparation protocols further adds to the complexity. To address these challenges, we present a scalable, fault-tolerant method for preparing encoded $k$-uniform states, and we illustrate our approach using surface and color codes. We first present a technique to determine $k$-uniformity of stabilizer states directly from their stabilizer tableau. We then identify a family of Clifford circuits that ensures both fault tolerance and scalability in preparing these states. Building on the encoded $k$-uniform states, we introduce a hybrid physical-logical strategy that retains some of the error-protection benefits of logical qubits while lowering the overhead for implementing arbitrary gates compared to fully logical algorithms. We show that this hybrid approach can outperform fully physical implementations for resource-state preparation, as demonstrated by explicit constructions of $k$-uniform states.

Figures (7)

• Figure 1: Fault-tolerant circuit architecture. For an $[n, \kappa, d]$ code, logical qubits are grouped into $\kappa$-qubit blocks. Transversal gates are applied within each block, followed by two-qubit transversal gates between neighboring blocks in a brickwork pattern.
• Figure 2: State preparation circuits for the surface code.$k =$ 1 to 4 for plots (a) to (d). In all cases, the initial state is $\ket{0}^{\otimes N}$. Our protocol imposes the following requirements: (a) $N \geq 2$, (b) $N \geq 6$, (c) $N \geq 12$, and (d) $N \geq 18$.
• Figure 3: State preparation circuits for the $[4,2,2]$ color code.$k =$ 1 to 4 for plots (a) to (d). In all cases, the initial state is $\ket{+}^{\otimes N}$. Our protocol imposes the following requirements: (a) $N \geq 2$, (b) $N \geq 6$, (c) $N \geq 10$, and (d) $N \geq 20$. For case (d), if $N/2$ is odd, the second-to-last CZ gate is omitted instead of the last one.
• Figure 4: Example of the unencoding protocol for the $[4,2,2]$ color code. The protocol begins with the preparation of the teleportation resource state, $\tfrac{1}{\sqrt{2}}\left(\ket{\overline{0}0} + \ket{\overline{1}1}\right)$. Logical qubits are manipulated using their logical gate counterparts during the teleportation process. Correction gates $G_1$ and $G_2$ are applied based on measurement outcomes to complete the protocol.
• Figure 5: Hybrid circuits outperforming physical circuits in state preparation even when using small distance codes. Numerical comparison of the hybrid and physical circuits in preparing physical $k$-uniform states under realistic noise models. For all plots we use $10^{6}$ samples of the circuit. The error bars are included in both figures but are too small to be clearly visible. For (a) to (c) we set qubits = $50$, $p_0 = p/100$, $p_1 = p/10$, and $p_2 = p_3 = p$. $p$ is plotted on the $x$-axis. For (d) to (f) We set $p_0 = 10^{-5}$, $p_1 = 10^{-4}$, $p_2 = 10^{-3}$, and $p_3 = 10^{-3}$.