APINT: A Full-Stack Framework for Acceleration of Privacy-Preserving Inference of Transformers based on Garbled Circuits
Hyunjun Cho, Jaeho Jeon, Jaehoon Heo, Joo-Young Kim
TL;DR
APINT presents a holistic, full-stack framework to accelerate Privacy-Preserving Inference of Transformers (PiT) by substantially reducing GC latency. It combines a GC-aware protocol that offloads linear computations to Homomorphic Encryption (HE) and standard ops, GC-friendly circuit generation to minimize AND gates, novel netlist scheduling for data reuse, and a compiler-guided hardware accelerator with speculation to reduce memory stalls. The framework achieves 12.2x online and 2.2x offline end-to-end latency improvements on CPU relative to PRIMER, and demonstrates average 3.3x GC-latency reduction and 4.6x system-energy savings with the APINT accelerator. These results indicate APINT’s potential to make privacy-preserving Transformer inference practical at scale across CPU and dedicated hardware platforms.
Abstract
As the importance of Privacy-Preserving Inference of Transformers (PiT) increases, a hybrid protocol that integrates Garbled Circuits (GC) and Homomorphic Encryption (HE) is emerging for its implementation. While this protocol is preferred for its ability to maintain accuracy, it has a severe drawback of excessive latency. To address this, existing protocols primarily focused on reducing HE latency, thus making GC the new latency bottleneck. Furthermore, previous studies only focused on individual computing layers, such as protocol or hardware accelerator, lacking a comprehensive solution at the system level. This paper presents APINT, a full-stack framework designed to reduce PiT's overall latency by addressing the latency problem of GC through both software and hardware solutions. APINT features a novel protocol that reallocates possible GC workloads to alternative methods (i.e., HE or standard matrix operation), substantially decreasing the GC workload. It also suggests GC-friendly circuit generation that reduces the number of AND gates at the most, which is the expensive operator in GC. Furthermore, APINT proposes an innovative netlist scheduling that combines coarse-grained operation mapping and fine-grained scheduling for maximal data reuse and minimal dependency. Finally, APINT's hardware accelerator, combined with its compiler speculation, effectively resolves the memory stall issue. Putting it all together, APINT achieves a remarkable end-to-end reduction in latency, outperforming the existing protocol on CPU platform by 12.2x online and 2.2x offline. Meanwhile, the APINT accelerator not only reduces its latency by 3.3x but also saves energy consumption by 4.6x while operating PiT compared to the state-of-the-art GC accelerator.