Table of Contents
Fetching ...

Light Virtualization: a proof-of-concept for hardware-based virtualization

Francesco Ciraolo, Mattia Nicolella, Denis Hoornaert, Marco Caccamo, Renato Mancuso

TL;DR

The paper addresses the inefficiency and rigidity of traditional virtualization by introducing LightV, a hardware-based approach that intercepts cache-coherence traffic to steer VA-to-PA translations and thereby enables selective, on-demand virtualization with minimal CPU overhead. A proof-of-concept implementation on a Zynq UltraScale+ MPSoC demonstrates feasibility and shows negligible overhead for non-targeted pages and approximately 1% overhead for single-page virtualization, aligning with prior hypervisor studies. LightV supports per-page granularity and dynamic translation semantics, all implemented in FPGA to avoid CPU-side virtualization costs. The work forecasts significant practical impact, enabling seamless page migration, multi-hypervisor coexistence, and flexible I/O device sharing, while outlining further research and vendor-oriented integration requirements.

Abstract

Virtualization has become widespread across all computing environments, from edge devices to cloud systems. Its main advantages are resource management through abstraction and improved isolation of platform resources and processes. However, there are still some important tradeoffs as it requires significant support from the existing hardware infrastructure and negatively impacts performance. Additionally, the current approaches to resource virtualization are inflexible, using a model that doesn't allow for dynamic adjustments during operation. This research introduces Light Virtualization (LightV), a new virtualization method for commercial platforms. LightV uses programmable hardware to direct cache coherence traffic, enabling precise and seamless control over which resources are virtualized. The paper explains the core principles of LightV, explores its capabilities, and shares initial findings from a basic proof-of-concept module tested on commercial hardware.

Light Virtualization: a proof-of-concept for hardware-based virtualization

TL;DR

The paper addresses the inefficiency and rigidity of traditional virtualization by introducing LightV, a hardware-based approach that intercepts cache-coherence traffic to steer VA-to-PA translations and thereby enables selective, on-demand virtualization with minimal CPU overhead. A proof-of-concept implementation on a Zynq UltraScale+ MPSoC demonstrates feasibility and shows negligible overhead for non-targeted pages and approximately 1% overhead for single-page virtualization, aligning with prior hypervisor studies. LightV supports per-page granularity and dynamic translation semantics, all implemented in FPGA to avoid CPU-side virtualization costs. The work forecasts significant practical impact, enabling seamless page migration, multi-hypervisor coexistence, and flexible I/O device sharing, while outlining further research and vendor-oriented integration requirements.

Abstract

Virtualization has become widespread across all computing environments, from edge devices to cloud systems. Its main advantages are resource management through abstraction and improved isolation of platform resources and processes. However, there are still some important tradeoffs as it requires significant support from the existing hardware infrastructure and negatively impacts performance. Additionally, the current approaches to resource virtualization are inflexible, using a model that doesn't allow for dynamic adjustments during operation. This research introduces Light Virtualization (LightV), a new virtualization method for commercial platforms. LightV uses programmable hardware to direct cache coherence traffic, enabling precise and seamless control over which resources are virtualized. The paper explains the core principles of LightV, explores its capabilities, and shares initial findings from a basic proof-of-concept module tested on commercial hardware.

Paper Structure

This paper contains 13 sections, 2 figures, 1 table.

Figures (2)

  • Figure 1: VA to PA translation in AArch64, 4 KB page granularity and 4 level of translation folded.
  • Figure 2: Skeleton and fundamental operations of a basic LightV module