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Feature-Aware Task-to-Core Allocation in Embedded Multi-core Platforms via Statistical Learning

Mohammad Pivezhandi, Abusayeed Saifullah, Prashant Modekurthy

TL;DR

The paper addresses energy and thermal efficiency in embedded multicore systems by optimizing task-to-core allocation on heterogeneous architectures. It introduces a hybrid statistical learning pipeline that fuses Random Forest-based feature reduction, backward stepwise OLS, and Pearson correlation to identify influential predictors and build compact environment models. Key results show up to 10% energy savings, up to 5°C cooler cores, and a 61.6% reduction in mean squared error over state-of-the-art baselines, validated across diverse hardware including Intel Core i7 12th Gen and Jetson TX2. This approach enables robust, low-overhead, correlation-aware allocations suitable for real-time embedded systems and scalable across platforms.

Abstract

Optimizing task-to-core allocation can substantially reduce power consumption in multi-core platforms without degrading user experience. However, existing approaches overlook critical factors such as parallelism, compute intensity, and heterogeneous core types. In this paper, we introduce a statistical learning approach for feature selection that identifies the most influential features-such as core type, speed, temperature, and application-level parallelism or memory intensity-for accurate environment modeling and efficient energy minimization, a critical consideration for embedded systems. Our experiments, conducted with state-of-the-art Linux governors and thermal modeling techniques, show that correlation-aware task-to-core allocation lowers energy consumption by up to 10% and reduces core temperature by up to 5C compared to random core selection. Furthermore, our compressed, bootstrapped regression model improves thermal prediction accuracy by 6% while cutting model parameters by 16%, yielding an overall mean square error reduction of 61.6% relative to existing approaches. We provided results based on superscalar Intel Core i7 12th Gen processors with 14 cores, and validated our method across a diverse set of hardware platforms and effectively balanced performance, power, and thermal demands through statistical feature evaluation.

Feature-Aware Task-to-Core Allocation in Embedded Multi-core Platforms via Statistical Learning

TL;DR

The paper addresses energy and thermal efficiency in embedded multicore systems by optimizing task-to-core allocation on heterogeneous architectures. It introduces a hybrid statistical learning pipeline that fuses Random Forest-based feature reduction, backward stepwise OLS, and Pearson correlation to identify influential predictors and build compact environment models. Key results show up to 10% energy savings, up to 5°C cooler cores, and a 61.6% reduction in mean squared error over state-of-the-art baselines, validated across diverse hardware including Intel Core i7 12th Gen and Jetson TX2. This approach enables robust, low-overhead, correlation-aware allocations suitable for real-time embedded systems and scalable across platforms.

Abstract

Optimizing task-to-core allocation can substantially reduce power consumption in multi-core platforms without degrading user experience. However, existing approaches overlook critical factors such as parallelism, compute intensity, and heterogeneous core types. In this paper, we introduce a statistical learning approach for feature selection that identifies the most influential features-such as core type, speed, temperature, and application-level parallelism or memory intensity-for accurate environment modeling and efficient energy minimization, a critical consideration for embedded systems. Our experiments, conducted with state-of-the-art Linux governors and thermal modeling techniques, show that correlation-aware task-to-core allocation lowers energy consumption by up to 10% and reduces core temperature by up to 5C compared to random core selection. Furthermore, our compressed, bootstrapped regression model improves thermal prediction accuracy by 6% while cutting model parameters by 16%, yielding an overall mean square error reduction of 61.6% relative to existing approaches. We provided results based on superscalar Intel Core i7 12th Gen processors with 14 cores, and validated our method across a diverse set of hardware platforms and effectively balanced performance, power, and thermal demands through statistical feature evaluation.

Paper Structure

This paper contains 30 sections, 3 equations, 8 figures, 4 tables.

Table of Contents

  1. Introduction
  2. Motivation and Challenges
  3. Curse of Dimensionality
  4. Large Data Management
  5. Performance Unpredictability
  6. Design Methodology
  7. Data Collection and Environment Setup
  8. Embedded Feature Selection Using Random Forest
  9. Random Forest Algorithm.
  10. Feature Importance Computation.
  11. Bootstrapping for Data Augmentation.
  12. Environment Modeling with Feature Selection.
  13. Wrapper-Based Feature Selection
  14. Backward Stepwise Selection Algorithm.
  15. Evaluation Metrics for Our Wrapper Algorithm.
  16. ...and 15 more sections

Figures (8)

  • Figure 1: Energy consumption variation across three different processors with identical frequency and core count settings: Intel Core i7 8th Gen (Corei78) with 4 cores, Intel Core i7 12th Gen (Corei712) with 14 cores, and Intel Xeon 2680 v3 (Xeon) with 12 cores. The results are shown for three different OpenMP benchmarks.
  • Figure 2: Determining the significance of features using Random Forest with respect to cross-validation error on Intel Core i7 12th Gen.
  • Figure 3: Backward stepwise selection for estimating energy consumption and average temperature. Retaining fewer than 8 predictors (features) yields accurate predictions in both cases. Experiments performed on Intel Core i7 12th Gen.
  • Figure 4: Correlation matrix based on Pearson correlation coefficients for 10 selected cores from an Intel Core i7 12th Gen processor with 14 cores.
  • Figure 5: Comparison of average temperature and energy consumption for correlation-based (Corr) and random (Rand) core selection. Experiments performed on Intel Core i7 12th Gen processor with 14 cores.
  • ...and 3 more figures