Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

RustSFQ: A Domain-Specific Language for SFQ Circuit Design

Mebuki Oishi, Sun Tanaka, Shinya Takamaeda-Yamazaki

TL;DR

SFQ circuits impose a strict one-to-one input--output constraint, complicating design with manual net naming and connectivity. The paper presents RustSFQ, a domain-specific language embedded in Rust that uses ownership semantics to statically enforce IO consistency and to emit netlists for SPICE and Verilog simulations. Key contributions include IO-safe circuit descriptions, automated net-name assignment, support for loops and counter-flow clocking, and a Reed--Solomon RS$(12,8)$ encoder case executed at $10\ \mathrm{GHz}$ validated by JoSIM and Icarus Verilog simulations. This approach improves productivity and reliability in SFQ design and demonstrates practical, high-frequency RS encoding within SFQ hardware.

Abstract

Cell-based design of a single-flux-quantum (SFQ) digital circuit requires input-output consistency; every output signal must be consumed only once by the input of the following component, which is a unique constraint, unlike the traditional CMOS digital circuit design. While there are some cell libraries and simulation tools for SFQ circuit development, they do not verify the input-output consistency, and designers have significant responsibilities to ensure it manually. Additionally, designers have to carefully manage net names without unintended duplication and correct connectivity among nets in a netlist for simulations. We propose RustSFQ, a domain-specific language (DSL) embedded in Rust that automatically ensures the input-output consistency in the SFQ circuit by leveraging the ownership system of Rust. Each SFQ circuit element is represented as a function while wires are represented as instances, and the Rust compiler verifies that multiple elements do not share a single wire through the ownership system. Circuit descriptions in the RustSFQ are successfully compiled into low-level netlists for both analog and digital circuit simulations, and the DSL provides higher productivity than the conventional design flow. Using the RustSFQ, we developed an SFQ-based Reed-Solomon encoder with a 4-bit width for the first time as a case study. We confirmed that the circuit operated correctly at 10 GHz through circuit simulations.

RustSFQ: A Domain-Specific Language for SFQ Circuit Design

TL;DR

SFQ circuits impose a strict one-to-one input--output constraint, complicating design with manual net naming and connectivity. The paper presents RustSFQ, a domain-specific language embedded in Rust that uses ownership semantics to statically enforce IO consistency and to emit netlists for SPICE and Verilog simulations. Key contributions include IO-safe circuit descriptions, automated net-name assignment, support for loops and counter-flow clocking, and a Reed--Solomon RS encoder case executed at validated by JoSIM and Icarus Verilog simulations. This approach improves productivity and reliability in SFQ design and demonstrates practical, high-frequency RS encoding within SFQ hardware.

Abstract

Cell-based design of a single-flux-quantum (SFQ) digital circuit requires input-output consistency; every output signal must be consumed only once by the input of the following component, which is a unique constraint, unlike the traditional CMOS digital circuit design. While there are some cell libraries and simulation tools for SFQ circuit development, they do not verify the input-output consistency, and designers have significant responsibilities to ensure it manually. Additionally, designers have to carefully manage net names without unintended duplication and correct connectivity among nets in a netlist for simulations. We propose RustSFQ, a domain-specific language (DSL) embedded in Rust that automatically ensures the input-output consistency in the SFQ circuit by leveraging the ownership system of Rust. Each SFQ circuit element is represented as a function while wires are represented as instances, and the Rust compiler verifies that multiple elements do not share a single wire through the ownership system. Circuit descriptions in the RustSFQ are successfully compiled into low-level netlists for both analog and digital circuit simulations, and the DSL provides higher productivity than the conventional design flow. Using the RustSFQ, we developed an SFQ-based Reed-Solomon encoder with a 4-bit width for the first time as a case study. We confirmed that the circuit operated correctly at 10 GHz through circuit simulations.

Paper Structure

This paper contains 16 sections, 5 equations, 6 figures, 3 tables.

Table of Contents

  1. Introduction
  2. RustSFQ
  3. Implementation and Basic Design
  4. Advanced Design
  5. Static Checking of Defective Circuits
  6. Automation of Net Name Assignment
  7. A Case Study on SFQ Reed--Solomon Encoder
  8. Reed--Solomon Code
  9. Existing CMOS Implementation of RS Encoder
  10. Designed SFQ Implementation of RS Encoder
  11. Constant Multipliers
  12. Pulse Gating
  13. Pipelining
  14. Clocking
  15. Simulation Results and Evaluation
  16. ...and 1 more sections

Figures (6)

  • Figure 1: Half adder circuit
  • Figure 2: Counter-flow clocking circuit with a loop
  • Figure 3: Parametrized delay circuit
  • Figure 4: A CMOS implementation of RS encoder
  • Figure 5: (a) Overall designed SFQ Reed--Solomon encoder, (b) Clockless gating circuit with an NDRO in Control Gate, (c), (d), (e) Galois field constant multipliers
  • ...and 1 more figures