Practical classical error correction for parity-encoded spin systems

TL;DR

The paper addresses fault-tolerant decoding for parity-encoded spin systems (PE/SLHZ) to enable scalable quantum annealing for combinatorial optimization problems by mapping the SLHZ readout to classical LDPC decoding. It introduces a practical Gallager bit-flipping (BF) decoding algorithm, leveraging two equivalent LDPC formulations $H^{source}(oldsymbol{Z})$ and $H^{code}(oldsymbol{z})$ to recover the original code-state from noisy measurements, with a focus on weight-3 syndromes that enable parallel, low-cost updates. Under i.i.d. noise, BF shows comparable performance to belief propagation (BP); for correlated errors, BF remains effective when combined with a stochastic readout via a two-stage MCMC-BF hybrid, where annealing parameters $eta$ and $eta$ tune the balance between correlation terms and penalties. The results indicate substantial decoding efficiency gains over BP and standard MCMC approaches, highlighting the practical potential of post-readout BF decoding to unlock the fault-tolerance advantages of the PE architecture in near-term QA hardware.

Abstract

Quantum annealing (QA) has emerged as a promising candidate for fast solvers for combinatorial optimization problems (COPs) and has attracted the interest of many researchers. Since COP is logically encoded in the Ising interaction among spins, its realization necessitates a spin system with all-to-all connectivity, presenting technical challenges in the physical implementation of large-scale QA devices. W. Lechner, P. Hauke, and P. Zoller proposed a parity-encoding (PE) architecture consisting of an expanded spin system with only local connectivity among them to circumvent this difficulty in developing near-future QA devices. They suggested that this architecture not only alleviates implementation challenges and enhances scalability but also possesses intrinsic fault tolerance. This paper proposes a practical decoding method tailored to correlated spin-flip errors in spin readout of PE architecture. Our work is based on the close connection between PE architecture and classical low-density parity-check (LDPC) codes. We show that the bit-flip (BF) decoding algorithm can correct independent and identically distributed errors in the readout of the SLHZ system with comparable performance to the belief propagation (BP) decoding algorithm. Then, we show evidence that the proposed BF decoding algorithm can efficiently correct correlated spinflip errors by simulation. The result suggests that introducing post-readout BF decoding reduces the computational cost of QA using the PE architecture and improves the performance of global optimal solution search. Our results emphasize the importance of the proper selection of decoding algorithms to exploit the inherent fault tolerance potential of the PE architecture.

Figures (11)

• Figure 1: A considered model for a communication system.
• Figure 2: Two representations of bipartite graph for $K=4$ logical spins. The dark blue circle labeled $\left\{ k,l\right\}$ represents the variable $x_{kl}$, while the red circles labeled $\left\{ k,l,m,n\right\}$ or $\left\{ k,l,m\right\}$ represent the weight-4 syndrome $s_{klmn}^{(4)}$ and weight-3 syndrome $s_{klm}^{(3)}$, respectively. In these diagrams, let us relabel the variables with blue letters. An element of code-word vector $\boldsymbol{x}=\left(x_{1},\ldots,x_{N_{v}}\right)\in\left\{ +1,-1\right\} ^{N_{v}}$ is called variable node (VN). The $i$-th syndrome of $\boldsymbol{x}$ is defined by $s_{i}\left(\boldsymbol{x}\right)=\prod_{k\in N\left(i\right)}x_{k}\in\left\{ +1,-1\right\}$ and an element of vector $\boldsymbol{s}(\boldsymbol{x})=\left(s_{1}\left(\boldsymbol{x}\right),\ldots,s_{N_{c}}\left(\boldsymbol{x}\right)\right)\in\left\{ +1,-1\right\} ^{N_{c}}$ is called a check node (CN), where $N\left(i\right)=\left\{ j:H_{ij}(H_{ij}^{'})=1\right\}$ is the VNs adjacent to a CN $i$$\left(1\leq i\leq N_{c}\right)$ and $M\left(j\right)=\left\{ i:H_{ij}(H_{ij}^{'})=1\right\}$ is the CNs adjacent to a VN $j$$\left(1\leq j\leq N_{v}\right)$. The column and row weights of the parity-check matrix are defined by $d_{v}(i)=\left|M\left(j\right)\right|$ and $d_{c}(i)=\left|N\left(i\right)\right|$, respectively.
• Figure 3: Bipartite graph topologically equivalent to Fig.\ref{['fig:2']}(a). This graph avoids any edge crossings.
• Figure 4: Binary symmetric channel associated with the parameters $\gamma_{ij}$ and $p_{k}$.
• Figure 5: Bipartite graph for $K=5$ logical spins. Solid blue lines show an example of the shortest loop of edges connecting VNs and CNs, which has a length of 6.