Performance Analysis of Digital Flux-locked Loop Circuit with Different SQUID $V$-$φ$ Transfer Curves for TES Readout System

Abstract

A superconducting quantum interference device (SQUID), functioning as a nonlinear response device, typically requires the incorporation of a flux-locked loop (FLL) circuit to facilitate linear amplification of the current signal transmitted through a superconducting transition-edge sensor (TES) across a large dynamic range.This work presents a reasonable model of the SQUID-FLL readout system, based on a digital proportional-integral-differential (PID) flux negative feedback algorithm.This work investigates the effect of $V$-$φ$ shape on the performance of digital FLL circuits.Such as the impact factors of bandwidth, design limits of slew rate of the system and the influence of the shapes of SQUID $V$-$φ$ curve.Furthermore, the dynamic response of the system to X-ray pulse signals with rise time ranging from $4.4{\sim}281$ $\mathrm{μs}$ and amplitudes ranging from $6{\sim}8$ $\mathrm{φ_0}$ was simulated.All the simulation results were found to be consistent with the existing mature theories, thereby validating the accuracy of the model.The results also provide a reliable modelling reference for the design of digital PID flux negative feedback and multiplexing SQUID readout electronic systems.

Figures (11)

• Figure 1: SQUID-FLL readout circuit model. $\phi_{in}$ is the input flux signal and $\phi_{fb}$ is the feedback flux. $G_1$ is linear gain of room temperature preamplifier. $\phi_{offset}$ is the magnetic flux offset bias applied to the feedback coil here. $u_{offset}$ is the voltage offset of the amplifier. The left figure shows the principle design of analog SQUID-FLL circuit. The right figure is the equivalent digital PID circuit. Analog feedback (AFB) and digital feedback (DFB) circuits are included in the green dashed lines.
• Figure 2: Time logic of digital sample frequency and frame clock (feedback frequency). Sampled error signals $u_{err}(i)$ are used to calculate next frame feedback signal $u_{o}(n)$ based on PID algorithm.
• Figure 3: Simulation result of SQUID-FLL model based on PID algorithm with low frequency triangle wave. (a) Black line show the relationship between output flux $\phi_{fb}$ and input flux $\phi_{in}$ without flux lock loop. Red line shows the locked linear gain with default PID parameters at lock point (red dot). All PID parameters on the legend are relative values calculated according to Table \ref{['tab:1']} and shifted 7 bits to the left. (b) $\phi_{fb}$ (red dashed line) tracks $\phi_{in}$ (blue solid line) in time domain after flux lock. The orange dotted line below shows the tracked flux error, which is less than 10 $\mathrm{\mu{\phi_0}}$.
• Figure 4: Simulation results of SQUID-FLL model (red lines) under different flux offsets $\phi_{offset}$ and voltage offset $u_{offset}$ (black lines). $u_{offset}$ is added after $G_1$.
• Figure 5: Simulation results of SQUID-FLL (red lines) under varying SQUID $V$-$\phi$ response. (a) SQUID lock status at small bias current. The superconducting state exists at this moment. (b) Lock status at asymmetric response.