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LLM-USO: Large Language Model-based Universal Sizing Optimizer

Karthik Somayaji N. S, Peng Li

TL;DR

LLM-USO tackles the challenge of analog circuit design optimization by fusing Bayesian Optimization, large language models, and a novel structured knowledge representation to enable cross-circuit transfer learning. It introduces a three-part approach: (i) a formal, sub-structure–level knowledge representation that ties performance metrics, sub-structures, and design parameters, (ii) a knowledge-summarization pipeline that generates and critiques structured summaries with in-context reuse from related circuits, and (iii) an uncertainty-aware ranking of LLM-generated design points guided by BO. Empirical results across diverse analog circuits show that information reuse plus uncertainty-based ranking yields superior design quality and efficiency versus ADO-LLM and GP-BO baselines, particularly in complex design spaces with shared sub-structures. The work demonstrates practical benefits of transferring optimization insights between circuits and highlights the role of structured, language-driven knowledge in accelerating expert-like design decisions. Overall, LLM-USO advances knowledge-driven, transferable, and efficient automated analog circuit optimization with potential impact on IC design workflows.

Abstract

The design of analog circuits is a cornerstone of integrated circuit (IC) development, requiring the optimization of complex, interconnected sub-structures such as amplifiers, comparators, and buffers. Traditionally, this process relies heavily on expert human knowledge to refine design objectives by carefully tuning sub-components while accounting for their interdependencies. Existing methods, such as Bayesian Optimization (BO), offer a mathematically driven approach for efficiently navigating large design spaces. However, these methods fall short in two critical areas compared to human expertise: (i) they lack the semantic understanding of the sizing solution space and its direct correlation with design objectives before optimization, and (ii) they fail to reuse knowledge gained from optimizing similar sub-structures across different circuits. To overcome these limitations, we propose the Large Language Model-based Universal Sizing Optimizer (LLM-USO), which introduces a novel method for knowledge representation to encode circuit design knowledge in a structured text format. This representation enables the systematic reuse of optimization insights for circuits with similar sub-structures. LLM-USO employs a hybrid framework that integrates BO with large language models (LLMs) and a learning summary module. This approach serves to: (i) infuse domain-specific knowledge into the BO process and (ii) facilitate knowledge transfer across circuits, mirroring the cognitive strategies of expert designers. Specifically, LLM-USO constructs a knowledge summary mechanism to distill and apply design insights from one circuit to related ones. It also incorporates a knowledge summary critiquing mechanism to ensure the accuracy and quality of the summaries and employs BO-guided suggestion filtering to identify optimal design points efficiently.

LLM-USO: Large Language Model-based Universal Sizing Optimizer

TL;DR

LLM-USO tackles the challenge of analog circuit design optimization by fusing Bayesian Optimization, large language models, and a novel structured knowledge representation to enable cross-circuit transfer learning. It introduces a three-part approach: (i) a formal, sub-structure–level knowledge representation that ties performance metrics, sub-structures, and design parameters, (ii) a knowledge-summarization pipeline that generates and critiques structured summaries with in-context reuse from related circuits, and (iii) an uncertainty-aware ranking of LLM-generated design points guided by BO. Empirical results across diverse analog circuits show that information reuse plus uncertainty-based ranking yields superior design quality and efficiency versus ADO-LLM and GP-BO baselines, particularly in complex design spaces with shared sub-structures. The work demonstrates practical benefits of transferring optimization insights between circuits and highlights the role of structured, language-driven knowledge in accelerating expert-like design decisions. Overall, LLM-USO advances knowledge-driven, transferable, and efficient automated analog circuit optimization with potential impact on IC design workflows.

Abstract

The design of analog circuits is a cornerstone of integrated circuit (IC) development, requiring the optimization of complex, interconnected sub-structures such as amplifiers, comparators, and buffers. Traditionally, this process relies heavily on expert human knowledge to refine design objectives by carefully tuning sub-components while accounting for their interdependencies. Existing methods, such as Bayesian Optimization (BO), offer a mathematically driven approach for efficiently navigating large design spaces. However, these methods fall short in two critical areas compared to human expertise: (i) they lack the semantic understanding of the sizing solution space and its direct correlation with design objectives before optimization, and (ii) they fail to reuse knowledge gained from optimizing similar sub-structures across different circuits. To overcome these limitations, we propose the Large Language Model-based Universal Sizing Optimizer (LLM-USO), which introduces a novel method for knowledge representation to encode circuit design knowledge in a structured text format. This representation enables the systematic reuse of optimization insights for circuits with similar sub-structures. LLM-USO employs a hybrid framework that integrates BO with large language models (LLMs) and a learning summary module. This approach serves to: (i) infuse domain-specific knowledge into the BO process and (ii) facilitate knowledge transfer across circuits, mirroring the cognitive strategies of expert designers. Specifically, LLM-USO constructs a knowledge summary mechanism to distill and apply design insights from one circuit to related ones. It also incorporates a knowledge summary critiquing mechanism to ensure the accuracy and quality of the summaries and employs BO-guided suggestion filtering to identify optimal design points efficiently.

Paper Structure

This paper contains 24 sections, 6 equations, 7 figures, 8 tables, 1 algorithm.

Figures (7)

  • Figure 1: LLM-USO: Employs structured design knowledge summaries from related circuits for the optimization of the current circuit. LLM-USO generated the optimal design point $x^*$ and also the knowledge summary for the given circuit.
  • Figure 2: Illustration of analog design knowledge representation
  • Figure 3: Knowledge Summary Generation: Involves using the circuit definition, top demonstration examples in the common data buffer and a structured prompt design as inputs to the LLM top generate the structured design knowledge summary. Top demonstration examples are sampled from the common data buffer using top-K sampling.
  • Figure 4: Illustration of the prompt design to extract structured design knowledge
  • Figure 5: Illustration of the refined knowledge summary generation for sample statements from the low dropout regulator. The refined summary consists of extra context relevant information which can help in transfer learning.
  • ...and 2 more figures