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Accelerated DC loadflow solver for topology optimization

Nico Westerbeck, Joost van Dijk, Jan Viebahn, Christian Merz, Dirk Witthaut

TL;DR

The paper tackles the computational bottleneck of fast DC loadflow computations for topology optimization by introducing a massively parallel solver that leverages low-rank updates of the PTDF to represent topology changes without refactoring. The core method uses PTDF-based representations (BSDF, LODF, MODF) and runs on GPUs to achieve billions of loadflows per second for batches of candidate topologies, computing $p_{n0}$ and $p_{n1}$ efficiently. It differentiates branch topology changes from nodal injections, enabling an in-loop brute-force search over injections and memory- and computation-aware handling of multi-outage scenarios. The results show substantial throughput gains across grids of varying sizes, enabling scalable gradient-free topology optimization for grid planning and operation, while noting the DC approximation's limitations such as missing voltage magnitudes and some accuracy trade-offs.

Abstract

We present a massively parallel solver that accelerates DC loadflow computations for power grid topology optimization tasks. Our approach leverages low-rank updates of the Power Transfer Distribution Factors (PTDFs) to represent substation splits, line outages, and reconfigurations without ever refactorizing the system. Furthermore, we implement the core routines on Graphics Processing Units (GPUs), thereby exploiting their high-throughput architecture for linear algebra. A two-level decomposition separates changes in branch topology from changes in nodal injections, enabling additional speed-ups by an in-the-loop brute force search over injection variations at minimal additional cost. We demonstrate billion-loadflow-per-second performance on power grids of varying sizes in workload settings which are typical for gradient-free topology optimization such as Reinforcement Learning or Quality Diversity methods. While adopting the DC approximation sacrifices some accuracy and prohibits the computation of voltage magnitudes, we show that this sacrifice unlocks new scales of computational feasibility, offering a powerful tool for large-scale grid planning and operational topology optimization.

Accelerated DC loadflow solver for topology optimization

TL;DR

The paper tackles the computational bottleneck of fast DC loadflow computations for topology optimization by introducing a massively parallel solver that leverages low-rank updates of the PTDF to represent topology changes without refactoring. The core method uses PTDF-based representations (BSDF, LODF, MODF) and runs on GPUs to achieve billions of loadflows per second for batches of candidate topologies, computing and efficiently. It differentiates branch topology changes from nodal injections, enabling an in-loop brute-force search over injections and memory- and computation-aware handling of multi-outage scenarios. The results show substantial throughput gains across grids of varying sizes, enabling scalable gradient-free topology optimization for grid planning and operation, while noting the DC approximation's limitations such as missing voltage magnitudes and some accuracy trade-offs.

Abstract

We present a massively parallel solver that accelerates DC loadflow computations for power grid topology optimization tasks. Our approach leverages low-rank updates of the Power Transfer Distribution Factors (PTDFs) to represent substation splits, line outages, and reconfigurations without ever refactorizing the system. Furthermore, we implement the core routines on Graphics Processing Units (GPUs), thereby exploiting their high-throughput architecture for linear algebra. A two-level decomposition separates changes in branch topology from changes in nodal injections, enabling additional speed-ups by an in-the-loop brute force search over injection variations at minimal additional cost. We demonstrate billion-loadflow-per-second performance on power grids of varying sizes in workload settings which are typical for gradient-free topology optimization such as Reinforcement Learning or Quality Diversity methods. While adopting the DC approximation sacrifices some accuracy and prohibits the computation of voltage magnitudes, we show that this sacrifice unlocks new scales of computational feasibility, offering a powerful tool for large-scale grid planning and operational topology optimization.

Paper Structure

This paper contains 13 sections, 17 equations, 3 figures, 3 tables.

Table of Contents

  1. Introduction
  2. Background: DC Loadflow Theory
  3. Solver Architecture
  4. Task Definition
  5. CPU Architecture
  6. GPU Architecture
  7. Design decisions
  8. Injection-branch differentiation and injection bruteforcing
  9. Dealing with expensive information extraction functions
  10. Choice of programming language
  11. Representing multiple outages
  12. Case Studies
  13. Discussion

Figures (3)

  • Figure 1: Two different layouts of computation for the set of branch topologies S1, S2, S1+S2, S1+S3, S2+S3. The tree-formulation needs fewer BSDF applications, while the sequence computation exhibits more parallelization potential
  • Figure 2: We evaluate two effects, the effect of increasing the size of $T_i$ and computing the topology in metrics-first or output-first mode. These modes are defined in Sec. \ref{['sec:metric_first']}. Computed on benchmark grid 2 as presented in Tab. \ref{['table:grids']}.
  • Figure 3: Comparing the repeated LODF and the MODF for different number of disconnections. Computed on benchmark grid 2 with $|T_i|=1$.

Theorems & Definitions (6)

  • Definition 1
  • Definition 2
  • Definition 3
  • Definition 4
  • Definition 5
  • Definition 6