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A Survey of Research in Large Language Models for Electronic Design Automation

Jingyu Pan, Guanglei Zhou, Chen-Chia Chang, Isaac Jacobson, Jiang Hu, Yiran Chen

TL;DR

This survey analyzes how large language models are increasingly shaping Electronic Design Automation across system-level, RTL, logic synthesis, and analog design. It synthesizes evidence on model architectures, sizes, and customization strategies, highlighting notable gains in system-level co-design (e.g., speedups of up to $25\times$ in certain LCDA workflows) and advances in HDL generation, debugging, and documentation QA. The paper identifies key bottlenecks, including data access restrictions, backend integration, verification rigor, and energy costs, and discusses multi-modal representations and domain-specific adaptations as promising directions. By mapping current capabilities to practical EDA workflows, it offers a foundation for researchers and industry to advance AI-assisted hardware design while addressing ethical, security, and efficiency considerations.

Abstract

Within the rapidly evolving domain of Electronic Design Automation (EDA), Large Language Models (LLMs) have emerged as transformative technologies, offering unprecedented capabilities for optimizing and automating various aspects of electronic design. This survey provides a comprehensive exploration of LLM applications in EDA, focusing on advancements in model architectures, the implications of varying model sizes, and innovative customization techniques that enable tailored analytical insights. By examining the intersection of LLM capabilities and EDA requirements, the paper highlights the significant impact these models have on extracting nuanced understandings from complex datasets. Furthermore, it addresses the challenges and opportunities in integrating LLMs into EDA workflows, paving the way for future research and application in this dynamic field. Through this detailed analysis, the survey aims to offer valuable insights to professionals in the EDA industry, AI researchers, and anyone interested in the convergence of advanced AI technologies and electronic design.

A Survey of Research in Large Language Models for Electronic Design Automation

TL;DR

This survey analyzes how large language models are increasingly shaping Electronic Design Automation across system-level, RTL, logic synthesis, and analog design. It synthesizes evidence on model architectures, sizes, and customization strategies, highlighting notable gains in system-level co-design (e.g., speedups of up to in certain LCDA workflows) and advances in HDL generation, debugging, and documentation QA. The paper identifies key bottlenecks, including data access restrictions, backend integration, verification rigor, and energy costs, and discusses multi-modal representations and domain-specific adaptations as promising directions. By mapping current capabilities to practical EDA workflows, it offers a foundation for researchers and industry to advance AI-assisted hardware design while addressing ethical, security, and efficiency considerations.

Abstract

Within the rapidly evolving domain of Electronic Design Automation (EDA), Large Language Models (LLMs) have emerged as transformative technologies, offering unprecedented capabilities for optimizing and automating various aspects of electronic design. This survey provides a comprehensive exploration of LLM applications in EDA, focusing on advancements in model architectures, the implications of varying model sizes, and innovative customization techniques that enable tailored analytical insights. By examining the intersection of LLM capabilities and EDA requirements, the paper highlights the significant impact these models have on extracting nuanced understandings from complex datasets. Furthermore, it addresses the challenges and opportunities in integrating LLMs into EDA workflows, paving the way for future research and application in this dynamic field. Through this detailed analysis, the survey aims to offer valuable insights to professionals in the EDA industry, AI researchers, and anyone interested in the convergence of advanced AI technologies and electronic design.
Paper Structure (15 sections, 2 figures, 3 tables)

This paper contains 15 sections, 2 figures, 3 tables.

Table of Contents

  1. Introduction
  2. Background on LLM
  3. Trends in Large Language Models for EDA
  4. System-level Design
  5. RTL Design
  6. Logic Synthesis and Physical Design
  7. Analog Circuit Applications
  8. From the LLM Methodology Perspective
  9. Selection of LLM and Size
  10. Customization Techniques
  11. Multi-Modal Feature Representation
  12. Outlook on LLMs for EDA
  13. Academic Infrastructure
  14. Application Bottlenecks
  15. Ethics, Security, and Efficiency

Figures (2)

  • Figure 1: Overview of Large Language Models for EDA applications. Data sources comprise circuit representations from different design stages. Earlier stages typically uses textual data for semantic representations; Later stages involves data of a wider range of modalities, including graphs and images, for detail representations. With proper encoders applied, the circuit data can be processed by the LLMs for novel applications in each design stage.
  • Figure 2: Comparing the functional correctness of Verilog code generation on VerilogEval-machine liu2023verilogeval/ VerilogEval-Human liu2023verilogeval/ RTLLM lu2023rtllm. The performance of the naive SFT methods correlates well with the model size. State-of-the-art customization methods have outperformed the best of prompt engineering methods with GPT-4.