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Myths around quantum computation before full fault tolerance: What no-go theorems rule out and what they don't

Zoltán Zimborás, Bálint Koczor, Zoë Holmes, Elsi-Mari Borrelli, András Gilyén, Hsin-Yuan Huang, Zhenyu Cai, Antonio Acín, Leandro Aolita, Leonardo Banchi, Fernando G. S. L. Brandão, Daniel Cavalcanti, Toby Cubitt, Sergey N. Filippov, Guillermo García-Pérez, John Goold, Orsolya Kálmán, Elica Kyoseva, Matteo A. C. Rossi, Boris Sokolov, Ivano Tavernelli, Sabrina Maniscalco

TL;DR

This perspective critically reevaluates common beliefs about near-term quantum computing in light of no-go theorems and hardware noise. It analyzes quantum error mitigation and variational algorithms, arguing that exponential sampling overheads do not automatically doom near-term utility, especially as gate errors improve. The authors outline a staged evolution from late NISQ to early fault tolerance, discuss how QEM can extend to logical errors, and examine the viability and limits of variational methods, concluding that useful quantum advantages are plausible in specific, well-chosen tasks before full fault tolerance is achieved. The work underscores hardware-software co-design and targeted applications—particularly quantum dynamics and simulation—as realistic avenues to demonstrate meaningful quantum advantage in the coming era.

Abstract

In this perspective article, we revisit and critically evaluate prevailing viewpoints on the capabilities and limitations of near-term quantum computing and its potential transition toward fully fault-tolerant quantum computing. We examine theoretical no-go results and their implications, addressing misconceptions about the practicality of quantum error mitigation techniques and variational quantum algorithms. By emphasizing the nuances of error scaling, circuit depth, and algorithmic feasibility, we highlight viable near-term applications and synergies between error mitigation and early fault-tolerant architectures. Our discussion explores strategies for addressing current challenges, such as barren plateaus in variational circuits and the integration of quantum error mitigation and quantum error correction techniques. We aim to underscore the importance of continued innovation in hardware and algorithmic design to bridge the gap between theoretical potential and practical utility, paving the way for meaningful quantum advantage in the era of late noisy intermediate scale and early fault-tolerant quantum devices.

Myths around quantum computation before full fault tolerance: What no-go theorems rule out and what they don't

TL;DR

This perspective critically reevaluates common beliefs about near-term quantum computing in light of no-go theorems and hardware noise. It analyzes quantum error mitigation and variational algorithms, arguing that exponential sampling overheads do not automatically doom near-term utility, especially as gate errors improve. The authors outline a staged evolution from late NISQ to early fault tolerance, discuss how QEM can extend to logical errors, and examine the viability and limits of variational methods, concluding that useful quantum advantages are plausible in specific, well-chosen tasks before full fault tolerance is achieved. The work underscores hardware-software co-design and targeted applications—particularly quantum dynamics and simulation—as realistic avenues to demonstrate meaningful quantum advantage in the coming era.

Abstract

In this perspective article, we revisit and critically evaluate prevailing viewpoints on the capabilities and limitations of near-term quantum computing and its potential transition toward fully fault-tolerant quantum computing. We examine theoretical no-go results and their implications, addressing misconceptions about the practicality of quantum error mitigation techniques and variational quantum algorithms. By emphasizing the nuances of error scaling, circuit depth, and algorithmic feasibility, we highlight viable near-term applications and synergies between error mitigation and early fault-tolerant architectures. Our discussion explores strategies for addressing current challenges, such as barren plateaus in variational circuits and the integration of quantum error mitigation and quantum error correction techniques. We aim to underscore the importance of continued innovation in hardware and algorithmic design to bridge the gap between theoretical potential and practical utility, paving the way for meaningful quantum advantage in the era of late noisy intermediate scale and early fault-tolerant quantum devices.
Paper Structure (11 sections, 2 tables)