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Hardware-aware Circuit Cutting and Distributed Qubit Mapping for Connected Quantum Systems

Zefan Du, Yanni Li, Zijian Mo, Wenqi Wei, Juntao Chen, Rajkumar Buyya, Ying Mao

TL;DR

DisMap addresses the challenge of scalable quantum computation across chip-to-chip systems by integrating circuit cutting with hardware-aware distributed qubit mapping. It constructs a Virtual System Topology from low-noise entanglement links to guide circuit partitioning and mapping, balancing fidelity gains against SWAP overhead. Across diverse workloads and hardware topologies, DisMap yields fidelity improvements up to $20.8\%$ and SWAP overhead reductions up to $80.2\%$, demonstrating practical benefits for large quantum circuits. This hardware-aware framework enables more efficient utilization of multi-chip quantum processors, advancing the feasibility of distributed quantum computing in near-term devices.

Abstract

Quantum computing offers unparalleled computational capabilities but faces significant challenges, including limited qubit counts, diverse hardware topologies, and dynamic noise/error rates, which hinder scalability and reliability. Distributed quantum computing, particularly chip-to-chip connections, has emerged as a solution by interconnecting multiple processors to collaboratively execute large circuits. While hardware advancements, such as IBM's Quantum Flamingo, focus on improving inter-chip fidelity, limited research addresses efficient circuit cutting and qubit mapping in distributed systems. This project introduces DisMap, a self-adaptive, hardware-aware framework for chip-to-chip distributed quantum systems. DisMap analyzes qubit noise and error rates to construct a virtual system topology, guiding circuit partitioning, and distributed qubit mapping to minimize SWAP overhead and enhance fidelity. Implemented with IBM Qiskit and compared with the state-of-the-art, DisMap achieves up to a 20.8\% improvement in fidelity and reduces SWAP overhead by as much as 80.2\%, demonstrating scalability and effectiveness in extensive evaluations on real quantum hardware topologies.

Hardware-aware Circuit Cutting and Distributed Qubit Mapping for Connected Quantum Systems

TL;DR

DisMap addresses the challenge of scalable quantum computation across chip-to-chip systems by integrating circuit cutting with hardware-aware distributed qubit mapping. It constructs a Virtual System Topology from low-noise entanglement links to guide circuit partitioning and mapping, balancing fidelity gains against SWAP overhead. Across diverse workloads and hardware topologies, DisMap yields fidelity improvements up to and SWAP overhead reductions up to , demonstrating practical benefits for large quantum circuits. This hardware-aware framework enables more efficient utilization of multi-chip quantum processors, advancing the feasibility of distributed quantum computing in near-term devices.

Abstract

Quantum computing offers unparalleled computational capabilities but faces significant challenges, including limited qubit counts, diverse hardware topologies, and dynamic noise/error rates, which hinder scalability and reliability. Distributed quantum computing, particularly chip-to-chip connections, has emerged as a solution by interconnecting multiple processors to collaboratively execute large circuits. While hardware advancements, such as IBM's Quantum Flamingo, focus on improving inter-chip fidelity, limited research addresses efficient circuit cutting and qubit mapping in distributed systems. This project introduces DisMap, a self-adaptive, hardware-aware framework for chip-to-chip distributed quantum systems. DisMap analyzes qubit noise and error rates to construct a virtual system topology, guiding circuit partitioning, and distributed qubit mapping to minimize SWAP overhead and enhance fidelity. Implemented with IBM Qiskit and compared with the state-of-the-art, DisMap achieves up to a 20.8\% improvement in fidelity and reduces SWAP overhead by as much as 80.2\%, demonstrating scalability and effectiveness in extensive evaluations on real quantum hardware topologies.

Paper Structure

This paper contains 14 sections, 1 equation, 3 figures, 1 table, 2 algorithms.

Table of Contents

  1. Introduction
  2. Background and Motivation
  3. Quantum Circuit Cutting
  4. Chip-to-Chip Distributed Quantum Computing
  5. Noises and Qubit Mapping
  6. Motivation
  7. Solution Design
  8. Problem Setting and Objectives
  9. System Overview
  10. Algorithms Design
  11. Performance Evaluation
  12. Implementation and Evaluation Settings
  13. Experiment Results
  14. Conclusion

Figures (3)

  • Figure 1: (a) Virtual System Topology ($VST$) with EPR between Q4 in worker-0, and Q3 in worker-1. (b) Subcircuits with gates that are not able to map into topology. (c) Qubit mapping with swapped subcircuits 0 & 1 in worker 0 & 1.
  • Figure 2: DisMap System Overview
  • Figure 3: A 3-worker system with AlmadenV2, Auckland and TorontoV2 and input circuit sizes from 18 to 34.