Entropy Density Benchmarking of Near-Term Quantum Circuits
Marine Demarty, James Mills, Kenza Hammam, Raul Garcia-Patron
TL;DR
This work introduces entropy-density benchmarking as a bridge between circuit- and application-level benchmarking for NISQ devices. It develops a simple global depolarizing heuristic to model entropy accumulation in variational quantum circuits, validates it against classical-simulation and experimental data, and refines it with T1-relaxation effects. By combining this entropy-accumulation model with an application-level quantum-advantage framework, the authors derive tighter circuit-size bounds that delineate where quantum advantage is still feasible, demonstrating practical implications for MAX-CUT on superconducting hardware. The study highlights both the promise of entropy-based benchmarks and the need for more sophisticated noise models and error-mitigation strategies to tighten predictions for larger systems and diverse platforms.
Abstract
Understanding the limitations imposed by noise on current and next-generation quantum devices is a crucial step towards demonstrating practical quantum advantage. In this work, we investigate the accumulation of entropy density as a benchmark to monitor the performance of quantum processing units. We provide a proof-of-principle demonstration of our novel methodology which entails developing simple heuristic models of how entropy accumulates, testing them against real QPU experiments, and finally using these models to determine a circuit volume threshold above which quantum advantage is unattainable. Monitoring entropy density not only offers a novel approach that complements existing circuit-level benchmarking techniques, but more importantly, it bridges the gap between circuit-level and application-level benchmarking protocols. In particular, our heuristic model of entropy accumulation allows us to outperform existing techniques that bound the circuit size threshold for quantum advantage.
