Logo
ScienceStack
Table of Contents
Fetching ...
Sign In

The Reliability Issue in ReRam-based CIM Architecture for SNN: A Survey

Wei-Ting Chen

TL;DR

The paper surveys reliability challenges at the intersection of Spiking Neural Networks and ReRAM-based Compute-in-Memory architectures, highlighting device-level variations and operational errors that affect accuracy and energy efficiency. It covers core SNN principles (LIF neurons, spike coding, STDP, surrogate-gradient learning, and ANN-to-SNN conversion) and ReRAM crossbar MAC operations, detailing how variability and off-state currents introduce overlapping errors. It then summarizes mitigation strategies (WRD, AISD, BRD, DFP, DVA) for ReRAM reliability and protection techniques (BnP) for SNN accelerators, while discussing the integration of SNNs with non-volatile memory and the need for robust, generalizable analyses beyond simulations. The practical implication is that SNNs with CIM architectures are a promising path for low-power edge AI, but achieving reliable real-world deployment demands comprehensive design, training, and validation frameworks that account for device variability and encoding/decoding choices.

Abstract

The increasing complexity and energy demands of deep learning models have highlighted the limitations of traditional computing architectures, especially for edge devices with constrained resources. Spiking Neural Networks (SNNs) offer a promising alternative by mimicking biological neural networks, enabling energy-efficient computation through event-driven processing and temporal encoding. Concurrently, emerging hardware technologies like Resistive Random Access Memory (ReRAM) and Compute-in-Memory (CIM) architectures aim to overcome the Von Neumann bottleneck by integrating storage and computation. This survey explores the intersection of SNNs and ReRAM-based CIM architectures, focusing on the reliability challenges that arise from device-level variations and operational errors. We review the fundamental principles of SNNs and ReRAM crossbar arrays, discuss the inherent reliability issues in both technologies, and summarize existing solutions to mitigate these challenges.

The Reliability Issue in ReRam-based CIM Architecture for SNN: A Survey

TL;DR

The paper surveys reliability challenges at the intersection of Spiking Neural Networks and ReRAM-based Compute-in-Memory architectures, highlighting device-level variations and operational errors that affect accuracy and energy efficiency. It covers core SNN principles (LIF neurons, spike coding, STDP, surrogate-gradient learning, and ANN-to-SNN conversion) and ReRAM crossbar MAC operations, detailing how variability and off-state currents introduce overlapping errors. It then summarizes mitigation strategies (WRD, AISD, BRD, DFP, DVA) for ReRAM reliability and protection techniques (BnP) for SNN accelerators, while discussing the integration of SNNs with non-volatile memory and the need for robust, generalizable analyses beyond simulations. The practical implication is that SNNs with CIM architectures are a promising path for low-power edge AI, but achieving reliable real-world deployment demands comprehensive design, training, and validation frameworks that account for device variability and encoding/decoding choices.

Abstract

The increasing complexity and energy demands of deep learning models have highlighted the limitations of traditional computing architectures, especially for edge devices with constrained resources. Spiking Neural Networks (SNNs) offer a promising alternative by mimicking biological neural networks, enabling energy-efficient computation through event-driven processing and temporal encoding. Concurrently, emerging hardware technologies like Resistive Random Access Memory (ReRAM) and Compute-in-Memory (CIM) architectures aim to overcome the Von Neumann bottleneck by integrating storage and computation. This survey explores the intersection of SNNs and ReRAM-based CIM architectures, focusing on the reliability challenges that arise from device-level variations and operational errors. We review the fundamental principles of SNNs and ReRAM crossbar arrays, discuss the inherent reliability issues in both technologies, and summarize existing solutions to mitigate these challenges.

Paper Structure

This paper contains 23 sections, 2 equations, 7 figures.

Table of Contents

  1. Introduction
  2. Spiking Neural Network
  3. LIF Neuron Model
  4. Spike Coding
  5. Rate Coding
  6. Temporal Coding
  7. Delta Modulation
  8. Learning Rules
  9. Unsupervised Learning
  10. Supervised Learning
  11. ANN to SNN Conversion
  12. ReRam and Crossbar Array
  13. Reliability Issue in ReRam and SNN
  14. Reliability Issue in ReRam
  15. Device-Level Variation
  16. ...and 8 more sections

Figures (7)

  • Figure 1: A synapse connects the pre-synaptic neuron to the post-synaptic neuron
  • Figure 2: The input signals are received by dendrites, processed in the cell body, when membrane potential exceeds a certain threshold, the neuron will emit a spike.
  • Figure 3: Equivalent circuit model of a leaky integrate-and-fire (LIF) neuron.
  • Figure 4: A typical Hodgkin–Huxley model
  • Figure 5: Representation of MAC computation a ReRAM crossbar array
  • ...and 2 more figures