Modeling and Simulating Rydberg Atom Quantum Computers for Hardware-Software Co-design with PachinQo

TL;DR

PachinQo addresses the challenge of running general quantum algorithms on zonal-addressing Rydberg-atom quantum computers. It introduces a hardware-software co-design framework featuring a dual-cache architecture, MaxCut-based initialization, and preemptive SWAPs to minimize crosstalk and improve execution efficiency. The framework yields significant gains, including a ~20% reduction in circuit runtime and ~45% improvement in estimated success probability across 51–1000 qubit benchmarks, with sub-second compilation times for most cases. These contributions enable scalable and reliable execution of diverse algorithms on zonal architectures and are complemented by an open-source simulator and compiler to foster further research.

Abstract

Quantum computing has the potential to accelerate various domains: scientific computation, machine learning, and optimization. Recently, Rydberg atom quantum computing has emerged as a promising quantum computing technology, especially with the demonstration of the zonal addressing architecture. However, this demonstration is only compatible with one type of quantum algorithm, and extending it to compile and execute general quantum algorithms is a challenge. To address it, we propose PachinQo, a framework to co-design the architecture and compilation for zonal addressing systems for any given quantum algorithm. PachinQo's evaluation demonstrates its ability to improve a quantum algorithm's estimated probability of success by 45% on average in error-prone quantum environments.

Figures (20)

• Figure 1: (a) An example quantum circuit. The qubit state evolves from left to right (horizontal lines); the vertical lines with circular ends represent the CZ gates between the two corresponding qubits. At the end of the circuit, all qubits are measured using readout operations (circular meters). (b) Physical setup of a Rydberg atom quantum computer.
• Figure 2: (a) The CZ gate between qubits Q2-Q3 can execute as they are within each other's interaction radius and are not blocked by other qubits. However, the CZ gates between Q0-Q1 and Q4-Q5 cannot execute as Q1 and Q4 are blocked by each other. (b) By putting Q4 and Q5 in the AOD (the rest can be in the SLM), they can be moved farther away from Q0-Q1, and now all three CZ gates can execute in parallel.
• Figure 3: Two methods of executing the Q0-Q1 CZ gate: (1) Trap change to convert Q1 from an SLM to an AOD qubit, and (2) SWAP the states of Q1 and Q4. Trap changes are time-consuming, and SWAPs are error-prone.
• Figure 4: We develop PachinQo for the recently-demonstrated zonal addressing architecture bluvstein2024logical, which achieves the best balance between the individual and global addressing architectures, making it a promising scalable configuration. The zones are not depicted to scale -- their dimensions vary in different figures based on ease of visualization. In our experiments, we maintain consistent and realistic scales.
• Figure 5: In the current zonal architecture, it is possible to run algorithms with all parallel two-qubit CZ gates (e.g., surface codes) but not general quantum computing algorithms.