BOSS: Blocking algorithm for optimizing shuttling scheduling in Ion Trap
Xian Wu, Chenghong Zhu, Jingbo Wang, Xin Wang
TL;DR
This work addresses shuttling-induced fidelity loss and time overhead in linear ion-trap quantum computers by introducing BOSS, a blocking algorithm for optimized shuttling scheduling within the TILT architecture. BOSS partitions circuits into blocks of size up to $m$ qubits, then schedules these blocks to maximize in-zone gate execution while minimizing shuttle and swap operations, achieving substantial reductions in shuttle counts and dramatic reductions in execution time in simulations. The approach is analyzed for computational complexity ($O(ng)$) and validated against benchmarks, with fidelity and timing modeled to reflect realistic cooling and gate implementations, including sympathetic cooling between shuttles. The results indicate significant practical benefits for near-term ion-trap devices, including up to 96.1% shuttle reduction and up to ~180× faster compilation in some circuits, highlighting the method’s potential to enable scalable, high-fidelity quantum computations on large ion-trap systems. The work also situates BOSS within the broader context of ion-trap compilation and QCCD/tile architectures, outlining avenues for further improvement via heuristic integration and reduced reliance on swap gates.
Abstract
Ion traps stand at the forefront of quantum hardware technology, presenting unparalleled benefits for quantum computing, such as high-fidelity gates, extensive connectivity, and prolonged coherence times. In this context, we explore the critical role of shuttling operations within these systems, especially their influence on the fidelity loss and elongated execution times. To address these challenges, we have developed BOSS, an efficient blocking algorithm tailored to enhance shuttling efficiency. This optimization not only bolsters the shuttling process but also elevates the overall efficacy of ion trap devices. We experimented on multiple applications using two qubit gates up to 4000+ and qubits ranging from 64 to 78. Our method significantly reduces the number of shuttles on most applications, with a maximum reduction of 96.1%. Additionally, our investigation includes simulations of realistic experimental parameters that incorporate sympathetic cooling, offering a higher fidelity and a refined estimate of execution times that align more closely with practical scenarios.
