A Proportional-Integral Model for Fractional Voltage Tripping of Distributed Energy Resources

TL;DR

The paper addresses the challenge of predicting DER disconnections during voltage disturbances in grids with high DER penetration. It introduces a gray-box PI fractional tripping block with seven undervoltage and seven overvoltage parameters, fitted via optimization to aggregated DER ride-through behavior and evaluated against the DER_A baseline using synthetic, VRT-aware data. The PI block achieves substantially higher accuracy in both in-sample and out-of-sample tests, demonstrating strong generalization and grid-code sensitivity. This approach offers a simple, interpretable, and scalable tool for dynamic security assessment and planning in modern distribution networks with heterogeneous DER fleets.

Abstract

In regions with high shares of distributed energy resources (DERs), massive disconnection of small-scale DERs in low-voltage distribution grids during disturbances poses a serious threat to power system security. However, modeling this effect in a computationally efficient way remains challenging. This paper proposes a novel proportional-integral aggregate model for predicting the fraction of tripped DERs based on the voltage at the substation connection point. The model effectively captures the cumulative behavior of the system, is simple to implement, and includes seven parameters for undervoltage tripping and seven for overvoltage tripping behavior, each with a distinct physical meaning. We further propose an optimization-based approach to tune the model parameters. Simulation results show significantly more accurate predictions compared to the DER\_A model -- a standard dynamic model for aggregate DER behavior -- even when the latter is optimized, with only a minor increase in model complexity.

Figures (7)

• Figure 1: Block diagram of the employed detailed DER model.
• Figure 2: Voltage disturbance withstand requirements and clearing times for trip for three modeled inverter types INV2005, INV2015, INV2020 derived from AS 4777.2-2005 AS2005, AS/NZS 4777.2:2015 AS2015, and AS/NZS 4777.2:2020 AS2020, respectively. The specified values incorporate findings from the inverter bench tests AEMO_tests and represent the average values used in the simulated fleet of inverters. Full parameter ranges are provided in Table \ref{['tab:bounds']} in the Appendix.
• Figure 3: DER_A fractional tripping block. Adopted from gustavo_pscc.
• Figure 4: Proposed PI fractional tripping block for undervoltage (analogous logic applies for overvoltage).
• Figure 5: One-line diagram of the IEEE 9-bus and CIGRE 18-bus test cases. The simulation model comprises 10 distribution grids (DG).