Multi-timescale synaptic plasticity on analog neuromorphic hardware

TL;DR

This work presents the implementation of a calcium-based plasticity rule that integrates calcium dynamics based on the synaptic tagging-and-capture hypothesis on the BrainScaleS-2 system and demonstrates that BrainScaleS-2 accurately emulates a single synapse following a calcium-based plasticity rule across four established stimulation protocols.

Abstract

As numerical simulations grow in complexity, their demands on computing time and energy increase. Accelerators for numerical computation offer significant efficiency gains in many computationally-intensive scientific fields, but their use in simulating spiking neural networks in computational neuroscience is hindered by challenges, mainly in effective parallelism and efficient use of memory in the presence of sparse representations and sparse communication. The BrainScaleS architectures are neuromorphic substrates that can emulate spiking neural networks at accelerated timescales compared to real time, which offers an advantage for studying complex plasticity rules that require extended simulation runtimes. This work presents the implementation of a calcium-based plasticity rule that integrates calcium dynamics based on the synaptic tagging-and-capture hypothesis on the BrainScaleS-2 system. The implementation of the plasticity rule for a single synapse involves incorporating the calcium dynamics and the plasticity rule equations. The calcium dynamics are mapped to the analog circuits of BrainScaleS-2, while the plasticity rule equations are numerically solved on its embedded digital processors. The main hardware constraints include the speed of the processors and the use of integer arithmetic. By adjusting the timestep of the numerical solver and introducing stochastic rounding, we demonstrate that BrainScaleS-2 accurately emulates a single synapse following a calcium-based plasticity rule across four established stimulation protocols and validate our implementation against a software reference model.

Figures (5)

• Figure 1: Schematic and chip photo of the asic. One embedded processor per chip half can run arbitrary code to access on-chip observables, such as membrane potentials, and to perform changes to topology, neuron and synapse parameterization.
• Figure 2: Experimental setup for emulating a single synapse following the considered plasticity rule on . The provides a real-time capable memory-buffered input and output interface for the neuromorphic chip. A spike source is placed on the and used to generate presynaptic spikes. These are forwarded to the postsynaptic neuron via a projection whose weight update obeys the considered plasticity rule. The same presynaptic spikes are mirrored to the parrot neuron to emulate the presynaptic calcium dynamics. The "bypass" mode of the parrot neuron ensures that presynaptic spikes are immediately translated to postsynaptic spikes. The weighted sum of the adaptation traces of the postsynaptic and parrot neurons represents the calcium trace. Calcium samples obtained by the are then used by the to calculate the model variables, including the synaptic weight, which will be used to update the weight of the projection. The mapping of the synaptic weight to hardware indicated by (*) has a negligible effect in the considered single synapse case, so we chose not to implement it in this work.
• Figure 3: Emulation of calcium dynamics recorded using the at 100kHz stimulation frequency. The theoretical calcium trace is calculated from Poisson spikes using \ref{['calcium-eqn']}. The experimental calcium trace is extracted using the adaptation trace of the model from the recorded spikes. The theoretical spikes are Poisson spikes simulated at 100kHz during 1ms, and the experimental spikes are recorded from the parrot neuron.
• Figure 4: Emulation results for the four stimulation protocols for one spike trial and 100.0 different update seeds. The trajectories in faded color show the individual trials, and the trajectory in bold shows the average behavior. The overall average behavior is in agreement with the behavior obtained by simulation for the four protocols.
• Figure 5: Emulation results for the four stimulation protocols compared against a simulation baseline at a time step of 50ms for 100.0 different spike trials. The lines correspond to the average early-phase and late-phase weights. The bands correspond to one standard deviation from the average. For comparison purposes, the simulation results are plotted at an accelerated factor of 1000.0 to match the time of the emulation results.