C2HLSC: Leveraging Large Language Models to Bridge the Software-to-Hardware Design Gap
Luca Collini, Siddharth Garg, Ramesh Karri
TL;DR
This paper tackles the software-to-hardware gap by using large language models to refactor generic C code into HLS-synthesizable C, enabling hardware acceleration via high-level synthesis. It introduces the C2HLSC framework, a hierarchical, automated pipeline that splits designs into function-level tasks, iteratively rewrites code, and then auto-inserts pragmas to optimize area or throughput. Case studies and a fully automated evaluation on real-world benchmarks (AES, DES, Present, NIST randomness tests, and QuickSort) demonstrate high success rates on substantially more complex designs than prior LLM-to-Verilog efforts, while highlighting the need for synthesis-feedback loops to refine optimization. The approach promises substantial time and cost savings for hardware design and provides an open-source platform for broader adoption and extension to more complex C/C++ codebases. The work advances hardware software co-design by leveraging LLMs at a higher abstraction level and integrating automated testing and synthesis feedback to produce viable HLS-ready C code.
Abstract
High-Level Synthesis (HLS) tools offer rapid hardware design from C code, but their compatibility is limited by code constructs. This paper investigates Large Language Models (LLMs) for automatically refactoring C code into HLS-compatible formats. We present a case study using an LLM to rewrite C code for NIST 800-22 randomness tests, a QuickSort algorithm, and AES-128 into HLS-synthesizable C. The LLM iteratively transforms the C code guided by the system prompt and tool's feedback, implementing functions like streaming data and hardware-specific signals. With the hindsight obtained from the case study, we implement a fully automated framework to refactor C code into HLS-compatible formats using LLMs. To tackle complex designs, we implement a preprocessing step that breaks down the hierarchy in order to approach the problem in a divide-and-conquer bottom-up way. We validated our framework on three ciphers, one hash function, five NIST 800-22 randomness tests, and a QuickSort algorithm. Our results show a high success rate on benchmarks that are orders of magnitude more complex than what has been achieved generating Verilog with LLMs.
