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A Simple Sparse Matrix Vector Multiplication Approach to Padded Convolution

Zan Chaudhry

TL;DR

The paper addresses the inefficiency of padding-aware convolution by formulating padding and the convolution as a sparse transformation using matrices P and C, enabling convolution via sparse matrix-vector multiplication (SpMV). A key theoretical contribution is Theorem 2.1, which provides an explicit expression for the number of non-zero multiplications, highlighting where sparsity reduces work. The authors implement proof-of-concept CPU and GPU versions and compare them to Conv2D on DenseNet121, showing CPU variants achieve speedups over Conv2D-C and competitiveGPU performance, particularly in fixed-kernel regimes. The work demonstrates sparsity-aware convolution as a promising direction for accelerating inference and motivates further development of sparse representations and multi-channel/batched extensions for real-time CNNs.

Abstract

We introduce an algorithm for efficiently representing convolution with zero-padding and stride as a sparse transformation matrix, applied to a vectorized input through sparse matrix-vector multiplication (SpMV). We provide a theoretical contribution with an explicit expression for the number of non-zero multiplications in convolutions with stride and padding, offering insight into the potential for leveraging sparsity in convolution operations. A proof-of-concept implementation is presented in Python, demonstrating the performance of our method on both CPU and GPU architectures. This work contributes to the broader exploration of sparse matrix techniques in convolutional algorithms, with a particular focus on leveraging matrix multiplications for parallelization. Our findings lay the groundwork for future advancements in exploiting sparsity to improve the efficiency of convolution operations in fields such as machine learning and signal processing.

A Simple Sparse Matrix Vector Multiplication Approach to Padded Convolution

TL;DR

The paper addresses the inefficiency of padding-aware convolution by formulating padding and the convolution as a sparse transformation using matrices P and C, enabling convolution via sparse matrix-vector multiplication (SpMV). A key theoretical contribution is Theorem 2.1, which provides an explicit expression for the number of non-zero multiplications, highlighting where sparsity reduces work. The authors implement proof-of-concept CPU and GPU versions and compare them to Conv2D on DenseNet121, showing CPU variants achieve speedups over Conv2D-C and competitiveGPU performance, particularly in fixed-kernel regimes. The work demonstrates sparsity-aware convolution as a promising direction for accelerating inference and motivates further development of sparse representations and multi-channel/batched extensions for real-time CNNs.

Abstract

We introduce an algorithm for efficiently representing convolution with zero-padding and stride as a sparse transformation matrix, applied to a vectorized input through sparse matrix-vector multiplication (SpMV). We provide a theoretical contribution with an explicit expression for the number of non-zero multiplications in convolutions with stride and padding, offering insight into the potential for leveraging sparsity in convolution operations. A proof-of-concept implementation is presented in Python, demonstrating the performance of our method on both CPU and GPU architectures. This work contributes to the broader exploration of sparse matrix techniques in convolutional algorithms, with a particular focus on leveraging matrix multiplications for parallelization. Our findings lay the groundwork for future advancements in exploiting sparsity to improve the efficiency of convolution operations in fields such as machine learning and signal processing.

Paper Structure

This paper contains 7 sections, 1 theorem, 14 equations, 2 figures, 2 tables, 3 algorithms.

Table of Contents

  1. Introduction
  2. Derivation
  3. Algorithm Implementation
  4. Experimental Results
  5. Materials and Methods
  6. Results and Discussion
  7. Conclusion

Key Result

Theorem 2.1

There are at most: non-zero multiplications when convolving a $k \times k$ kernel with an $m \times n$ input with padding $p$ and stride $s$, where:

Figures (2)

  • Figure 1: Mean execution times $(n=10,000)$ for CPU experiments are presented over the simulated, randomly generated DenseNet121 layers. Columns are stacked to show time differences between implementations.
  • Figure 2: Mean execution times $(n=10,000)$ for GPU experiments are presented over the simulated, randomly generated DenseNet121 layers. Columns are stacked to show time differences between implementations.

Theorems & Definitions (1)

  • Theorem 2.1