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CXL-Interference: Analysis and Characterization in Modern Computer Systems

Shunyu Mao, Jiajun Luo, Yixin Li, Jiapeng Zhou, Weidong Zhang, Zheng Liu, Teng Ma, Shuwen Deng

TL;DR

This work is the first to characterize CXL interference on real CXL hardware and provide reverse-reasoning analysis with performance counters and kernel functions, and proposes and evaluates mitigating solutions.

Abstract

Compute Express Link (CXL) is a promising technology that addresses memory and storage challenges. Despite its advantages, CXL faces performance threats from external interference when co-existing with current memory and storage systems. This interference is under-explored in existing research. To address this, we develop CXL-Interplay, systematically characterizing and analyzing interference from memory and storage systems. To the best of our knowledge, we are the first to characterize CXL interference on real CXL hardware. We also provide reverse-reasoning analysis with performance counters and kernel functions. In the end, we propose and evaluate mitigating solutions.

CXL-Interference: Analysis and Characterization in Modern Computer Systems

TL;DR

This work is the first to characterize CXL interference on real CXL hardware and provide reverse-reasoning analysis with performance counters and kernel functions, and proposes and evaluates mitigating solutions.

Abstract

Compute Express Link (CXL) is a promising technology that addresses memory and storage challenges. Despite its advantages, CXL faces performance threats from external interference when co-existing with current memory and storage systems. This interference is under-explored in existing research. To address this, we develop CXL-Interplay, systematically characterizing and analyzing interference from memory and storage systems. To the best of our knowledge, we are the first to characterize CXL interference on real CXL hardware. We also provide reverse-reasoning analysis with performance counters and kernel functions. In the end, we propose and evaluate mitigating solutions.

Paper Structure

This paper contains 24 sections, 8 figures, 5 tables.

Figures (8)

  • Figure 1: Schematic illustration of hardware setup
  • Figure 2: Datapaths in filesystem, CXL and MMEM workloads.
  • Figure 3: Microbenchmark case studies
  • Figure 4: CXL-related interference on real applications. The suffixes "-A/B/C/D" indicate the type to which the experiment belongs. We use different colors to differentiate background traffic types. For Type A, C and D, the background runs memory traffic which have three different types: ld, st and ntst. As for Type B, its background is file system and has four traffic types: read, randread, write and randwrite. We also use hatches to differentiate results from different systems. The height of the bars represents the maximum percentage of performance decline observed across all number of background thread count configurations for the corresponding scenarios. The y-axis is on logarithmic scale.
  • Figure 5: The performance (operations per second) of RocksDB under CXL traffic. The x-axis indicates the number of background threads.
  • ...and 3 more figures