NeoHebbian Synapses to Accelerate Online Training of Neuromorphic Hardware

TL;DR

System-level simulations confirm that this novel neoHebbian artificial synapse utilizing ReRAM devices offer a robust solution for the fast, compact, and energy-efficient implementation of advanced learning rules in neuromorphic hardware.

Abstract

Neuromorphic systems that employ advanced synaptic learning rules, such as the three-factor learning rule, require synaptic devices of increased complexity. Herein, a novel neoHebbian artificial synapse utilizing ReRAM devices has been proposed and experimentally validated to meet this demand. This synapse features two distinct state variables: a neuron coupling weight and an "eligibility trace" that dictates synaptic weight updates. The coupling weight is encoded in the ReRAM conductance, while the "eligibility trace" is encoded in the local temperature of the ReRAM and is modulated by applying voltage pulses to a physically co-located resistive heating element. The utility of the proposed synapse has been investigated using two representative tasks: first, temporal signal classification using Recurrent Spiking Neural Networks (RSNNs) employing the e-prop algorithm, and second, Reinforcement Learning (RL) for path planning tasks in feedforward networks using a modified version of the same learning rule. System-level simulations, accounting for various device and system-level non-idealities, confirm that these synapses offer a robust solution for the fast, compact, and energy-efficient implementation of advanced learning rules in neuromorphic hardware.

Figures (14)

• Figure 1: (a) Schematic of a spiking neural network incorporating neoHebbian synapses. (b) The evolution of signals $f(t)$, $\psi(t)$, and $e(t)$ during the dataframe presentation. $f_{i}(t)$ and $\psi_{j}(t)$ represent signals from the $i-$th pre-synaptic neuron and $j-$th post-synaptic neuron, respectively. $e_{ij}(t)$ is obtained by multiplying $f_{i}(t)$ and $\psi_{j}(t)$. (c) Characteristics features of a neoHebbian synapse - computing $e_{ij}(t)$ and accumulating it (i.e., $e_{\sum}$) during the data frame presentation. During the weight update, the weight change ($\Delta w_{ij}$) is proportional to the accumulated $e(t)$. $\eta$ represents the learning rate.
• Figure 2: High-level description of the thermal neoHebbian synapse operation: (a) Three key stages involved in the training operation of e-prop: spike integration (shaded blue), eligibility-update (shaded olive), and weight update (shaded red). Arrangement of the heater and ReRAM during (b) Spike integration, (c) e-update, and (d) Weight update phases. The red arrow depicts the thermal coupling between the heater and ReRAM. (e) Design of a crossbar array illustrating 3D-integrated heater and ReRAM cells.
• Figure 3: (a) Representative I-V curves measured with quasi-static DC voltage sweep at 1V/s on 250$\times$250nm$^2$ area devices. The inset provides the device stack details. Normalized percentage conductance change as a function of the initial conductance and ambient temperature is shown for the (b) SET and (c) RESET processes. The average normalized percentage conductance change as a function of ambient temperature for the SET and RESET processes is presented in (d) and (e), respectively. (f) Illustration of the measurement protocol used to obtain the data is shown in (b) and (c). The green pulse depicts the multiple SET, RESET, and read pulses required to reprogram the device to the same $G_\mathrm{0}$. $V_\mathrm{P}$ and $V_\mathrm{read}$, respectively, denotes fixed programming pulse used to measure $\Delta G$ and read pulse.
• Figure 4: 1$T$-1$H$-1$M$ unit cell implementation of the thermal neoHebbian synapse. During the dataframe presentation, the operation of the synapse is time multiplexed between (a) Spike integration - $\phi_E$ = 0 and (b) e-update - $\phi_E$ = 1 phase (c) Weight update is performed at the end of the dataframe - $\phi_W$ = 1. The appropriate biasing conditions for each phase are shown in the schematic.
• Figure 5: (a) Differential mode crossbar-array implementation of the 1$T$-1$H$-1$M$ design. (b) Key stages in the operation of e-prop: spike integration ($\phi_E$ = 0), e-update ($\phi_E$ = 1), and weight update ($\phi_W$ = 0). (c) Biasing condition at the respective terminal during these phases.