AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAG

TL;DR

This article introduces AMSnet-KG, a dataset encompassing various AMS circuit schematics and netlists, and proposes an automated AMS circuit generation framework that utilizes the comprehensive knowledge embedded in LLMs.

Abstract

High-performance analog and mixed-signal (AMS) circuits are mainly full-custom designed, which is time-consuming and labor-intensive. A significant portion of the effort is experience-driven, which makes the automation of AMS circuit design a formidable challenge. Large language models (LLMs) have emerged as powerful tools for Electronic Design Automation (EDA) applications, fostering advancements in the automatic design process for large-scale AMS circuits. However, the absence of high-quality datasets has led to issues such as model hallucination, which undermines the robustness of automatically generated circuit designs. To address this issue, this paper introduces AMSnet-KG, a dataset encompassing various AMS circuit schematics and netlists. We construct a knowledge graph with annotations on detailed functional and performance characteristics. Facilitated by AMSnet-KG, we propose an automated AMS circuit generation framework that utilizes the comprehensive knowledge embedded in LLMs. We first formulate a design strategy (e.g., circuit architecture using a number of circuit components) based on required specifications. Next, matched circuit components are retrieved and assembled into a complete topology, and transistor sizing is obtained through Bayesian optimization. Simulation results of the netlist are fed back to the LLM for further topology refinement, ensuring the circuit design specifications are met. We perform case studies of operational amplifier and comparator design to verify the automatic design flow from specifications to netlists with minimal human effort. The dataset used in this paper will be open-sourced upon publishing of this paper.

Figures (24)

• Figure 1: AMSnet-KG dataset (left & middle) and the workflow diagram of automatic AMS circuit topology design (right). AMSnet-KG dataset includes (a) circuit netlists, (b) corresponding annotations, and (c) an overall knowledge graph encompassing all circuits. Given the specifications, leveraging the extensive knowledge of LLM, the flow extracts relevant relation query triplets from the responses and retrieves the corresponding circuit topology from the knowledge graph. Automatic testbench pairing and transistor sizing complete the circuit design flow.
• Figure 2: LLM generating the full netlist directly versus describing its building blocks
• Figure 3: Pipeline of AMS circuit design from performance specifications to fully sized transistor-level netlist
• Figure 4: LLM conversation: from performance specification to design strategy (shortened, full version in the Appendix section \ref{['appendix:llm_conversations']}). The green text presents CoT prompt.
• Figure 5: LLM conversation: from circuit characteristics to extract triplets (shortened, full version in the Appendix section \ref{['appendix:llm_conversations']})