Trapped-ion quantum simulation of the Fermi-Hubbard model as a lattice gauge theory using hardware-aware native gates

TL;DR

This work demonstrates an algorithm–hardware co-design for deep, Trotterized digital quantum simulations of the Fermi-Hubbard model encoded as a Z2 lattice gauge theory on a trapped-ion quantum computer. The authors develop a hardware-aware, three-qubit ansatz (C_A) for a single Trotter step and optimize it with Iteratively Pre-conditioned Gradient Descent (IPG), achieving a substantial reduction in two-qubit gate count. They further compress circuit depth using von Neumann entropy (VNE) analysis while preserving the target unitary, yielding an overall 36% reduction in 2Q gates per Trotter step. Complementary error mitigation strategies—debiasing, sharpening, and symmetry-based post-selection—enable faithful observation of domain-wall quench dynamics on real hardware and under noisy simulations. The approach is generalizable to other strongly correlated systems and holds promise for extending digital quantum simulations in quantum chemistry and materials science on near-term devices.

Abstract

The Fermi-Hubbard model (FHM) is a simple yet rich model of strongly interacting electrons with complex dynamics and a variety of emerging quantum phases. These properties make it a compelling target for digital quantum simulation. Trotterization-based quantum simulations have shown promise, but implementations on current hardware are limited by noise, necessitating error mitigation techniques like circuit optimization and post-selection. A mapping of the FHM to a Z2 LGT was recently proposed that restricts the dynamics to a subspace protected by additional symmetries, and its ability for post-selection error mitigation was verified through noisy classical simulations. In this work, we propose and demonstrate a suite of algorithm-hardware co-design strategies on a trapped-ion quantum computer, targeting two key aspects of NISQ-era quantum simulation: circuit compilation and error mitigation. In particular, a novel combination of iteratively preconditioned gradient descent (IPG) and subsystem von Neumann Entropy compression reduces the 2-qubit gate count of FHM quantum simulation by 35%, consequently doubling the number of simulatable Trotter steps when used in tandem with error mitigation based on conserved symmetries, debiasing and sharpening techniques. Our work demonstrates the value of algorithm-hardware co-design to operate digital quantum simulators at the threshold of maximum circuit depths allowed by current hardware, and is broadly generalizable to strongly correlated systems in quantum chemistry and materials science.

Figures (5)

• Figure 1: Direct circuit decomposition of $\hat{C}$ and $\hat{B}$ for a single Trotter step of $H_{LGT}$ from khodaeva_quantum_2024. $\theta_{1} = 2J\Delta t$, $\theta_{2} = -2J\Delta t$, and $\theta_{3} = U\Delta t$
• Figure 2: Gradient based optimization for circuit optimization. a) Modified ansatz $\hat{C}_{A}$ from kandala_hardware-efficient_2017 used for gradient based optimization to parametrize $\hat{C}$. Each layer is comprised of $R_{X}(\theta_{1})$, $R_{y}(\theta_{2})$, $XX(\theta_{3})$ on qubits $S_{i, \sigma}$, $B_{i, i+1}$, and $S_{i+1, \sigma}$ respectively. Three layers are used with a final $R_{X}(\theta)$ and $R_{Y}(\theta)$ rotation on each qubit. b) Result of GBO for 30 parameters using IPG, Adam, and L-BFGS. Best cost history over three trials and 128 iterations for each optimizer. IPG achieves the highest fidelity circuit, approaching fidelity greater than $\mathcal{F} = 1- 10^{-7}$. L-BFGS is trapped in a local minimum. Note that while there were variations depending on the target unitary $\hat{C}$ and the initial guess, these trends were found to be quite representative of the observed behavior during optimization. The optimized angle for the $XX(\theta) \approx \mathbf{I}$ between $|S_{i, \sigma} \rangle$ and $| S_{i+1, \sigma} \rangle$, allowing that gate to be removed. c) Final pre-conditioner matrix $K$ from IPG, which estimates the inverse Hessian. Matrix elements concentrated around the main diagonal indicate a well conditioned estimate of the the inverse Hessian and a stable optimization result.
• Figure 3: Combining von Neumann Entropy (VNE) optimization with gradient based optimization for further two-qubit gate reduction on each subcircuit. a) Ansatz for the VNE optimization method. The ansatz number of layers is first truncated through the VNE method. Following this, gradient based optimization (GBO) is applied to find parameters such that $\hat{C}_{A} \approx \hat{C}$.During GBO, a number of single and two-qubit gate rotations go to $\mathcal{I}$, allowing further compression of the ansatz. b) Result of GBO over 13 parameters using IPG, Adam, and L-BFGS. Best cost history over three trials and 128 iterations for each optimizer. IPG achieves the highest fidelity circuit, approaching fidelity of $\mathcal{F} = 1- 10^{-7}$, with L-BFGS converging faster but to a lower fidelity (higher cost). c) Final pre-conditioner matrix $K$ from IPG, which estimates the inverse Hessian, similar to Fig. \ref{['fig:optimization']}.
• Figure 4: a) Circuit executions on the Aria-1 QPU without von Neuman entropy (VNE) two-qubit gate optimization (see Fig. \ref{['fig:combined_classical']} for results with VNE optimization). Magnetization correlator $\chi_{34}$ at five Trotter steps for $N=6$ sites of the Trotterized $H_{LGT}$ built from $\hat{C}$ (in various shades of green, with label "Direct") or $\hat{C}_{A}$ (in various shades of red, with label "Optimized"). Executed using 18 qubits. $J\Delta t = 0.3$, $U\Delta t = 0.6$. Each circuit is subject the global spin conservation as a post selection error mitigation strategy. Each circuit goes through no compiler-level error mitigation, debiasing (D), or debiasing and sharpening (D + S). b) Error denotes the absolute value difference between the ideal result and a circuit execution at each Trotter step. c) $\sigma_{34}$ denotes the standard deviation in $\chi_{34}$ at each Trotter step across three circuit executions of each variant.
• Figure 5: a) Circuit executions on a classical statevector simulator with von Neuman entropy (VNE) 2-qubit gate optimization. $\chi_{34}$ for $N = 6$ sites. Statevector simulator subject to a 2-qubit depolarizing noise channel at different weights $\gamma$. Magnetization correlator $\chi_{ij}$ at eight trotter steps of the trotterized $H_{LGT}$ built from $\hat{C}$ (green) or $\hat{C}_{A}$ (red). $J\Delta t = 0.4$, $U \Delta t = 0.8$. 1000 shots for every circuit execution. b) Error in $\chi_{ij}$ at each Trotter step is difference between each circuit and the noiseless result.