The Survey of Chiplet-based Integrated Architecture: An EDA perspective

TL;DR

This paper will review the research literature on design automation methods for chiplet-based architectures, highlighting current challenges and exploring opportunities in 2.5D IC from an EDA perspective and expected to provide valuable insights for the future development of EDA tools for chiplet-based integrated architectures.

Abstract

Enhancing performance while reducing costs is the fundamental design philosophy of integrated circuits (ICs). With advancements in packaging technology, interposer-based chiplet architecture has emerged as a promising solution. Chiplet integration, often referred to as 2.5D IC, offers significant benefits, including cost-effectiveness, reusability, and improved performance. However, realizing these advantages heavily relies on effective electronic design automation (EDA) processes. EDA plays a crucial role in optimizing architecture design, partitioning, combination, physical design, reliability analysis, etc. Currently, optimizing the automation methodologies for chiplet architecture is a popular focus; therefore, we propose a survey to summarize current methods and discuss future directions. This paper will review the research literature on design automation methods for chiplet-based architectures, highlighting current challenges and exploring opportunities in 2.5D IC from an EDA perspective. We expect this survey will provide valuable insights for the future development of EDA tools for chiplet-based integrated architectures.

Figures (4)

• Figure 1: The architecture of chiplet-based 2.5D IC.
• Figure 2: The EDA flow of the chiplet-based architecture.
• Figure 3: The relationship between cost, yield, and chip area across various manufacturing technology nodes.
• Figure 4: Illustration of partitioning and combining in chiplet-based architecture.